101     if (Src.isReg() && Src.getReg() == Exec)  in isCopyFromExec()
102       return MI.getOperand(0).getReg();  in isCopyFromExec()
116     if (Dst.isReg() && Dst.getReg() == Exec && MI.getOperand(1).isReg())  in isCopyToExec()
117       return MI.getOperand(1).getReg();  in isCopyToExec()
141     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
142       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
144     if (Src2.isReg() && Src2.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
145       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
157     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC_LO)  in isLogicalOpOnExec()
158       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
160     if (Src2.isReg() && Src2.getReg() == AMDGPU::EXEC_LO)  in isLogicalOpOnExec()
161       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
455     Register CopyFromExec = CopyFromExecInst->getOperand(0).getReg();  in optimizeExecSequence()
524     if (Src0.isReg() && Src0.getReg() == CopyFromExec) {  in optimizeExecSequence()
526     } else if (Src1.isReg() && Src1.getReg() == CopyFromExec) {  in optimizeExecSequence()
541         .addReg(OtherOp->getReg());  in optimizeExecSequence()
569   Register MoveDest = SaveExecInstr.getOperand(0).getReg();  in optimizeVCMPSaveExecSequence()
601     MRI->clearKillFlags(Src0->getReg());  in optimizeVCMPSaveExecSequence()
603     MRI->clearKillFlags(Src1->getReg());  in optimizeVCMPSaveExecSequence()
629   Register SaveExecDest = MI.getOperand(0).getReg();  in tryRecordVCmpxAndSaveexecSequence()
650                Check->modifiesRegister(SaveExecSrc0->getReg(), TRI);  in tryRecordVCmpxAndSaveexecSequence()
652       {Exec, SaveExecSrc0->getReg()});  in tryRecordVCmpxAndSaveexecSequence()
662   if (Src0->isReg() && TRI->isSGPRReg(*MRI, Src0->getReg()) &&  in tryRecordVCmpxAndSaveexecSequence()
663       MI.modifiesRegister(Src0->getReg(), TRI))  in tryRecordVCmpxAndSaveexecSequence()
667   if (Src1->isReg() && TRI->isSGPRReg(*MRI, Src1->getReg()) &&  in tryRecordVCmpxAndSaveexecSequence()
668       MI.modifiesRegister(Src1->getReg(), TRI))  in tryRecordVCmpxAndSaveexecSequence()
675   if (isLiveOut(*VCmp->getParent(), VCmpDest->getReg()))  in tryRecordVCmpxAndSaveexecSequence()
680   if (isRegisterInUseBetween(*VCmp, MI, VCmpDest->getReg(), false, true) ||  in tryRecordVCmpxAndSaveexecSequence()
681       isRegisterInUseAfter(MI, VCmpDest->getReg()))  in tryRecordVCmpxAndSaveexecSequence()
690     NonDefRegs.push_back(Src0->getReg());  in tryRecordVCmpxAndSaveexecSequence()
693     NonDefRegs.push_back(Src1->getReg());  in tryRecordVCmpxAndSaveexecSequence()
717     if (XorDst.isReg() && XorDst.getReg() == Exec && XorSrc0.isReg() &&  in tryRecordOrSaveexecXorSequence()
719         (XorSrc0.getReg() == Exec || XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
733         if ((XorSrc0.getReg() == Exec && XorSrc1.getReg() == OrDst.getReg()) ||  in tryRecordOrSaveexecXorSequence()
734             (XorSrc0.getReg() == OrDst.getReg() && XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
756             TII->get(Andn2Opcode), Or->getOperand(0).getReg())  in optimizeOrSaveexecXorSequences()
757         .addReg(Or->getOperand(1).getReg());  in optimizeOrSaveexecXorSequences()