Lines Matching refs:Exec
31 MCRegister Exec; member in __anon3ed21cdf0111::SIOptimizeExecMasking
56 MachineInstr &VCmp, MCRegister Exec) const;
101 if (Src.isReg() && Src.getReg() == Exec) in isCopyFromExec()
116 if (Dst.isReg() && Dst.getReg() == Exec && MI.getOperand(1).isReg()) in isCopyToExec()
438 PrepareExecInst->getOperand(0).setReg(Exec); in optimizeExecSequence()
463 if (SaveExecInst && J->readsRegister(Exec, TRI)) { in optimizeExecSequence()
547 OtherInst->substituteRegister(CopyToExec, Exec, AMDGPU::NoSubRegister, in optimizeExecSequence()
560 MachineInstr &SaveExecInstr, MachineInstr &VCmp, MCRegister Exec) const { in optimizeVCMPSaveExecSequence()
577 .addReg(Exec); in optimizeVCMPSaveExecSequence()
652 {Exec, SaveExecSrc0->getReg()}); in tryRecordVCmpxAndSaveexecSequence()
717 if (XorDst.isReg() && XorDst.getReg() == Exec && XorSrc0.isReg() && in tryRecordOrSaveexecXorSequence()
719 (XorSrc0.getReg() == Exec || XorSrc1.getReg() == Exec)) { in tryRecordOrSaveexecXorSequence()
733 if ((XorSrc0.getReg() == Exec && XorSrc1.getReg() == OrDst.getReg()) || in tryRecordOrSaveexecXorSequence()
734 (XorSrc0.getReg() == OrDst.getReg() && XorSrc1.getReg() == Exec)) { in tryRecordOrSaveexecXorSequence()
777 Exec = TRI->getExec(); in runOnMachineFunction()
798 if (MI.modifiesRegister(Exec, TRI)) { in runOnMachineFunction()
811 Changed |= optimizeVCMPSaveExecSequence(*SaveExecInstr, *VCmpInstr, Exec); in runOnMachineFunction()