42 enum class SIMemOp {  enum
311                                               SIMemOp Op, bool IsVolatile,
324                           SIMemOp Op,
387                                       SIAtomicAddrSpace AddrSpace, SIMemOp Op,
394                   SIMemOp Op,
440                                       SIAtomicAddrSpace AddrSpace, SIMemOp Op,
447                   SIMemOp Op,
501                                       SIAtomicAddrSpace AddrSpace, SIMemOp Op,
531                                       SIAtomicAddrSpace AddrSpace, SIMemOp Op,
538                   SIMemOp Op,
557                                       SIAtomicAddrSpace AddrSpace, SIMemOp Op,
920     MachineBasicBlock::iterator &MI, SIAtomicAddrSpace AddrSpace, SIMemOp Op,  in enableVolatileAndOrNonTemporal()
931   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
939     if (Op == SIMemOp::LOAD)  in enableVolatileAndOrNonTemporal()
967                                     SIMemOp Op,  in insertWait()
1111   return insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE,  in insertRelease()
1272     MachineBasicBlock::iterator &MI, SIAtomicAddrSpace AddrSpace, SIMemOp Op,  in enableVolatileAndOrNonTemporal()
1283   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
1291     if (Op == SIMemOp::LOAD)  in enableVolatileAndOrNonTemporal()
1319                                       SIMemOp Op,  in insertWait()
1574     MachineBasicBlock::iterator &MI, SIAtomicAddrSpace AddrSpace, SIMemOp Op,  in enableVolatileAndOrNonTemporal()
1585   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
1756   Changed |= insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE,  in insertRelease()
1806     MachineBasicBlock::iterator &MI, SIAtomicAddrSpace AddrSpace, SIMemOp Op,  in enableVolatileAndOrNonTemporal()
1818   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
1826     if (Op == SIMemOp::LOAD) {  in enableVolatileAndOrNonTemporal()
1846     if (Op == SIMemOp::STORE)  in enableVolatileAndOrNonTemporal()
1859                                      SIMemOp Op,  in insertWait()
1879       if ((Op & SIMemOp::LOAD) != SIMemOp::NONE)  in insertWait()
1881       if ((Op & SIMemOp::STORE) != SIMemOp::NONE)  in insertWait()
1891         if ((Op & SIMemOp::LOAD) != SIMemOp::NONE)  in insertWait()
1893         if ((Op & SIMemOp::STORE) != SIMemOp::NONE)  in insertWait()
2073     MachineBasicBlock::iterator &MI, SIAtomicAddrSpace AddrSpace, SIMemOp Op,  in enableVolatileAndOrNonTemporal()
2085   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
2093     if (Op == SIMemOp::LOAD)  in enableVolatileAndOrNonTemporal()
2114     if (Op == SIMemOp::STORE)  in enableVolatileAndOrNonTemporal()
2154                                 SIMemOp::LOAD | SIMemOp::STORE,  in expandLoad()
2162                                 SIMemOp::LOAD,  in expandLoad()
2177                                                 SIMemOp::LOAD, MOI.isVolatile(),  in expandLoad()
2210       MI, MOI.getInstrAddrSpace(), SIMemOp::STORE, MOI.isVolatile(),  in expandStore()
2289                                 isAtomicRet(*MI) ? SIMemOp::LOAD :  in expandAtomicCmpxchgOrRmw()
2290                                                    SIMemOp::STORE,  in expandAtomicCmpxchgOrRmw()