Lines Matching refs:CPol
278 AMDGPU::CPol::CPol Bit) const;
361 return enableNamedBit(MI, AMDGPU::CPol::GLC); in enableGLCBit()
367 return enableNamedBit(MI, AMDGPU::CPol::SLC); in enableSLCBit()
469 return enableNamedBit(MI, AMDGPU::CPol::SC0); in enableSC0Bit()
475 return enableNamedBit(MI, AMDGPU::CPol::SC1); in enableSC1Bit()
481 return enableNamedBit(MI, AMDGPU::CPol::NT); in enableNTBit()
519 return enableNamedBit(MI, AMDGPU::CPol::DLC); in enableDLCBit()
831 AMDGPU::CPol::CPol Bit) const { in enableNamedBit()
832 MachineOperand *CPol = TII->getNamedOperand(*MI, AMDGPU::OpName::cpol); in enableNamedBit() local
833 if (!CPol) in enableNamedBit()
836 CPol->setImm(CPol->getImm() | Bit); in enableNamedBit()
1434 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertRelease()
1636 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertAcquire()
1650 .addImm(AMDGPU::CPol::SC1); in insertAcquire()
1668 .addImm(AMDGPU::CPol::SC0); in insertAcquire()
1723 .addImm(AMDGPU::CPol::SC0 | AMDGPU::CPol::SC1); in insertRelease()
1732 .addImm(AMDGPU::CPol::SC1); in insertRelease()