141                     SISchedulerCandidate &TryCand,  in tryLess()  argument
145     TryCand.Reason = Reason;  in tryLess()
158                        SISchedulerCandidate &TryCand,  in tryGreater()  argument
162     TryCand.Reason = Reason;  in tryGreater()
192                                           SISchedCandidate &TryCand) {  in tryCandidateTopDown()  argument
195     TryCand.Reason = NodeOrder;  in tryCandidateTopDown()
200       SISched::tryLess(TryCand.SGPRUsage, Cand.SGPRUsage,  in tryCandidateTopDown()
201                        TryCand, Cand, RegUsage))  in tryCandidateTopDown()
219   if (SISched::tryLess(TryCand.HasLowLatencyNonWaitedParent,  in tryCandidateTopDown()
221                        TryCand, Cand, SIScheduleCandReason::Depth))  in tryCandidateTopDown()
224   if (SISched::tryGreater(TryCand.IsLowLatency, Cand.IsLowLatency,  in tryCandidateTopDown()
225                           TryCand, Cand, SIScheduleCandReason::Depth))  in tryCandidateTopDown()
228   if (TryCand.IsLowLatency &&  in tryCandidateTopDown()
229       SISched::tryLess(TryCand.LowLatencyOffset, Cand.LowLatencyOffset,  in tryCandidateTopDown()
230                        TryCand, Cand, SIScheduleCandReason::Depth))  in tryCandidateTopDown()
233   if (SISched::tryLess(TryCand.VGPRUsage, Cand.VGPRUsage,  in tryCandidateTopDown()
234                        TryCand, Cand, RegUsage))  in tryCandidateTopDown()
238   if (TryCand.SU->NodeNum < Cand.SU->NodeNum) {  in tryCandidateTopDown()
239     TryCand.Reason = NodeOrder;  in tryCandidateTopDown()
247     SISchedCandidate TryCand;  in pickNode()  local
251     TryCand.SU = SU;  in pickNode()
253     TryCand.SGPRUsage = pressure[AMDGPU::RegisterPressureSets::SReg_32];  in pickNode()
254     TryCand.VGPRUsage = pressure[AMDGPU::RegisterPressureSets::VGPR_32];  in pickNode()
255     TryCand.IsLowLatency = DAG->IsLowLatencySU[SU->NodeNum];  in pickNode()
256     TryCand.LowLatencyOffset = DAG->LowLatencyOffset[SU->NodeNum];  in pickNode()
257     TryCand.HasLowLatencyNonWaitedParent =  in pickNode()
259     tryCandidateTopDown(TopCand, TryCand);  in pickNode()
260     if (TryCand.Reason != NoCand)  in pickNode()
261       TopCand.setBest(TryCand);  in pickNode()
1527                                                    SIBlockSchedCandidate &TryCand) {  in tryCandidateLatency()  argument
1529     TryCand.Reason = NodeOrder;  in tryCandidateLatency()
1534   if (SISched::tryLess(TryCand.LastPosHighLatParentScheduled,  in tryCandidateLatency()
1535                  Cand.LastPosHighLatParentScheduled, TryCand, Cand, Latency))  in tryCandidateLatency()
1538   if (SISched::tryGreater(TryCand.IsHighLatency, Cand.IsHighLatency,  in tryCandidateLatency()
1539                           TryCand, Cand, Latency))  in tryCandidateLatency()
1541   if (TryCand.IsHighLatency && SISched::tryGreater(TryCand.Height, Cand.Height,  in tryCandidateLatency()
1542                                                    TryCand, Cand, Depth))  in tryCandidateLatency()
1544   if (SISched::tryGreater(TryCand.NumHighLatencySuccessors,  in tryCandidateLatency()
1546                           TryCand, Cand, Successor))  in tryCandidateLatency()
1552                                                     SIBlockSchedCandidate &TryCand) {  in tryCandidateRegUsage()  argument
1554     TryCand.Reason = NodeOrder;  in tryCandidateRegUsage()
1558   if (SISched::tryLess(TryCand.VGPRUsageDiff > 0, Cand.VGPRUsageDiff > 0,  in tryCandidateRegUsage()
1559                        TryCand, Cand, RegUsage))  in tryCandidateRegUsage()
1561   if (SISched::tryGreater(TryCand.NumSuccessors > 0,  in tryCandidateRegUsage()
1563                           TryCand, Cand, Successor))  in tryCandidateRegUsage()
1565   if (SISched::tryGreater(TryCand.Height, Cand.Height, TryCand, Cand, Depth))  in tryCandidateRegUsage()
1567   if (SISched::tryLess(TryCand.VGPRUsageDiff, Cand.VGPRUsageDiff,  in tryCandidateRegUsage()
1568                        TryCand, Cand, RegUsage))  in tryCandidateRegUsage()
1601     SIBlockSchedCandidate TryCand;  in pickBlock()  local
1602     TryCand.Block = *I;  in pickBlock()
1603     TryCand.IsHighLatency = TryCand.Block->isHighLatencyBlock();  in pickBlock()
1604     TryCand.VGPRUsageDiff =  in pickBlock()
1605       checkRegUsageImpact(TryCand.Block->getInRegs(),  in pickBlock()
1606           TryCand.Block->getOutRegs())[AMDGPU::RegisterPressureSets::VGPR_32];  in pickBlock()
1607     TryCand.NumSuccessors = TryCand.Block->getSuccs().size();  in pickBlock()
1608     TryCand.NumHighLatencySuccessors =  in pickBlock()
1609       TryCand.Block->getNumHighLatencySuccessors();  in pickBlock()
1610     TryCand.LastPosHighLatParentScheduled =  in pickBlock()
1612          LastPosHighLatencyParentScheduled[TryCand.Block->getID()] -  in pickBlock()
1614     TryCand.Height = TryCand.Block->Height;  in pickBlock()
1618       if (!tryCandidateRegUsage(Cand, TryCand) &&  in pickBlock()
1620         tryCandidateLatency(Cand, TryCand);  in pickBlock()
1622       if (!tryCandidateLatency(Cand, TryCand))  in pickBlock()
1623         tryCandidateRegUsage(Cand, TryCand);  in pickBlock()
1625     if (TryCand.Reason != NoCand) {  in pickBlock()
1626       Cand.setBest(TryCand);  in pickBlock()