Lines Matching refs:YamlIO

160   static void mapping(IO &YamlIO, SIArgument &A) {
161     if (YamlIO.outputting()) {
163         YamlIO.mapRequired("reg", A.RegisterName);
165         YamlIO.mapRequired("offset", A.StackOffset);
167       auto Keys = YamlIO.keys();
170         YamlIO.mapRequired("reg", A.RegisterName);
172         YamlIO.mapRequired("offset", A.StackOffset);
174         YamlIO.setError("missing required key 'reg' or 'offset'");
176     YamlIO.mapOptional("mask", A.Mask);
206   static void mapping(IO &YamlIO, SIArgumentInfo &AI) {
207     YamlIO.mapOptional("privateSegmentBuffer", AI.PrivateSegmentBuffer);
208     YamlIO.mapOptional("dispatchPtr", AI.DispatchPtr);
209     YamlIO.mapOptional("queuePtr", AI.QueuePtr);
210     YamlIO.mapOptional("kernargSegmentPtr", AI.KernargSegmentPtr);
211     YamlIO.mapOptional("dispatchID", AI.DispatchID);
212     YamlIO.mapOptional("flatScratchInit", AI.FlatScratchInit);
213     YamlIO.mapOptional("privateSegmentSize", AI.PrivateSegmentSize);
215     YamlIO.mapOptional("workGroupIDX", AI.WorkGroupIDX);
216     YamlIO.mapOptional("workGroupIDY", AI.WorkGroupIDY);
217     YamlIO.mapOptional("workGroupIDZ", AI.WorkGroupIDZ);
218     YamlIO.mapOptional("workGroupInfo", AI.WorkGroupInfo);
219     YamlIO.mapOptional("LDSKernelId", AI.LDSKernelId);
220     YamlIO.mapOptional("privateSegmentWaveByteOffset",
223     YamlIO.mapOptional("implicitArgPtr", AI.ImplicitArgPtr);
224     YamlIO.mapOptional("implicitBufferPtr", AI.ImplicitBufferPtr);
226     YamlIO.mapOptional("workItemIDX", AI.WorkItemIDX);
227     YamlIO.mapOptional("workItemIDY", AI.WorkItemIDY);
228     YamlIO.mapOptional("workItemIDZ", AI.WorkItemIDZ);
263   static void mapping(IO &YamlIO, SIMode &Mode) {
264     YamlIO.mapOptional("ieee", Mode.IEEE, true);
265     YamlIO.mapOptional("dx10-clamp", Mode.DX10Clamp, true);
266     YamlIO.mapOptional("fp32-input-denormals", Mode.FP32InputDenormals, true);
267     YamlIO.mapOptional("fp32-output-denormals", Mode.FP32OutputDenormals, true);
268     YamlIO.mapOptional("fp64-fp16-input-denormals", Mode.FP64FP16InputDenormals, true);
269     YamlIO.mapOptional("fp64-fp16-output-denormals", Mode.FP64FP16OutputDenormals, true);
309   void mappingImpl(yaml::IO &YamlIO) override;
314   static void mapping(IO &YamlIO, SIMachineFunctionInfo &MFI) {
315     YamlIO.mapOptional("explicitKernArgSize", MFI.ExplicitKernArgSize,
317     YamlIO.mapOptional("maxKernArgAlign", MFI.MaxKernArgAlign);
318     YamlIO.mapOptional("ldsSize", MFI.LDSSize, 0u);
319     YamlIO.mapOptional("gdsSize", MFI.GDSSize, 0u);
320     YamlIO.mapOptional("dynLDSAlign", MFI.DynLDSAlign, Align());
321     YamlIO.mapOptional("isEntryFunction", MFI.IsEntryFunction, false);
322     YamlIO.mapOptional("noSignedZerosFPMath", MFI.NoSignedZerosFPMath, false);
323     YamlIO.mapOptional("memoryBound", MFI.MemoryBound, false);
324     YamlIO.mapOptional("waveLimiter", MFI.WaveLimiter, false);
325     YamlIO.mapOptional("hasSpilledSGPRs", MFI.HasSpilledSGPRs, false);
326     YamlIO.mapOptional("hasSpilledVGPRs", MFI.HasSpilledVGPRs, false);
327     YamlIO.mapOptional("scratchRSrcReg", MFI.ScratchRSrcReg,
329     YamlIO.mapOptional("frameOffsetReg", MFI.FrameOffsetReg,
331     YamlIO.mapOptional("stackPtrOffsetReg", MFI.StackPtrOffsetReg,
333     YamlIO.mapOptional("bytesInStackArgArea", MFI.BytesInStackArgArea, 0u);
334     YamlIO.mapOptional("returnsVoid", MFI.ReturnsVoid, true);
335     YamlIO.mapOptional("argumentInfo", MFI.ArgInfo);
336     YamlIO.mapOptional("mode", MFI.Mode, SIMode());
337     YamlIO.mapOptional("highBitsOf32BitAddress",
339     YamlIO.mapOptional("occupancy", MFI.Occupancy, 0);
340     YamlIO.mapOptional("wwmReservedRegs", MFI.WWMReservedRegs);
341     YamlIO.mapOptional("scavengeFI", MFI.ScavengeFI);
342     YamlIO.mapOptional("vgprForAGPRCopy", MFI.VGPRForAGPRCopy,