Lines Matching refs:getNamedOperand
319 TII.getNamedOperand(MI, AMDGPU::OpName::dmask)->getImm(); in getOpcodeWidth()
672 DMask = LSO.TII->getNamedOperand(*I, AMDGPU::OpName::dmask)->getImm(); in setMI()
681 Format = LSO.TII->getNamedOperand(*I, AMDGPU::OpName::format)->getImm(); in setMI()
688 CPol = LSO.TII->getNamedOperand(*I, AMDGPU::OpName::cpol)->getImm(); in setMI()
800 const auto *TFEOp = TII.getNamedOperand(*CI.I, AMDGPU::OpName::tfe); in dmasksCanBeCombined()
801 const auto *LWEOp = TII.getNamedOperand(*CI.I, AMDGPU::OpName::lwe); in dmasksCanBeCombined()
997 if (const auto *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst)) { in getDataRegClass()
1000 if (const auto *Src = TII->getNamedOperand(MI, AMDGPU::OpName::vdata)) { in getDataRegClass()
1003 if (const auto *Src = TII->getNamedOperand(MI, AMDGPU::OpName::data0)) { in getDataRegClass()
1006 if (const auto *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst)) { in getDataRegClass()
1009 if (const auto *Src = TII->getNamedOperand(MI, AMDGPU::OpName::sdata)) { in getDataRegClass()
1091 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeRead2Pair()
1093 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdst); in mergeRead2Pair()
1094 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdst); in mergeRead2Pair()
1189 TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeWrite2Pair()
1191 TII->getNamedOperand(*CI.I, AMDGPU::OpName::data0); in mergeWrite2Pair()
1193 TII->getNamedOperand(*Paired.I, AMDGPU::OpName::data0); in mergeWrite2Pair()
1281 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeImagePair()
1282 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeImagePair()
1315 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::sbase)) in mergeSBufferLoadImmPair()
1326 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::sdst); in mergeSBufferLoadImmPair()
1327 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::sdst); in mergeSBufferLoadImmPair()
1360 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)); in mergeBufferLoadPair()
1368 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeBufferLoadPair()
1369 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset)) in mergeBufferLoadPair()
1382 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeBufferLoadPair()
1383 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeBufferLoadPair()
1416 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)); in mergeTBufferLoadPair()
1427 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeTBufferLoadPair()
1428 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset)) in mergeTBufferLoadPair()
1442 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeTBufferLoadPair()
1443 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeTBufferLoadPair()
1473 const auto *Src0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeTBufferStorePair()
1474 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeTBufferStorePair()
1488 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)); in mergeTBufferStorePair()
1499 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeTBufferStorePair()
1500 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset)) in mergeTBufferStorePair()
1526 if (auto *SAddr = TII->getNamedOperand(*CI.I, AMDGPU::OpName::saddr)) in mergeFlatLoadPair()
1530 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)) in mergeFlatLoadPair()
1541 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdst); in mergeFlatLoadPair()
1542 const auto *Dest1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdst); in mergeFlatLoadPair()
1572 const auto *Src0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeFlatStorePair()
1573 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeFlatStorePair()
1582 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)) in mergeFlatStorePair()
1585 if (auto *SAddr = TII->getNamedOperand(*CI.I, AMDGPU::OpName::saddr)) in mergeFlatStorePair()
1771 const auto *Src0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); in mergeBufferStorePair()
1772 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); in mergeBufferStorePair()
1786 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)); in mergeBufferStorePair()
1795 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) in mergeBufferStorePair()
1796 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset)) in mergeBufferStorePair()
1886 auto Base = TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); in updateBaseAndOffset()
1889 TII->getNamedOperand(MI, AMDGPU::OpName::offset)->setImm(NewOffset); in updateBaseAndOffset()
1940 const auto *Src0 = TII->getNamedOperand(*BaseLoDef, AMDGPU::OpName::src0); in processBaseWithConstOffset()
1941 const auto *Src1 = TII->getNamedOperand(*BaseLoDef, AMDGPU::OpName::src1); in processBaseWithConstOffset()
1952 Src0 = TII->getNamedOperand(*BaseHiDef, AMDGPU::OpName::src0); in processBaseWithConstOffset()
1953 Src1 = TII->getNamedOperand(*BaseHiDef, AMDGPU::OpName::src1); in processBaseWithConstOffset()
1984 TII->getNamedOperand(MI, AMDGPU::OpName::vdata) != nullptr) in promoteConstantOffsetToImm()
1992 if (TII->getNamedOperand(MI, AMDGPU::OpName::offset)->getImm()) { in promoteConstantOffsetToImm()
1998 MachineOperand &Base = *TII->getNamedOperand(MI, AMDGPU::OpName::vaddr); in promoteConstantOffsetToImm()
2057 TII->getNamedOperand(MINext, AMDGPU::OpName::offset)->getImm()) in promoteConstantOffsetToImm()
2061 *TII->getNamedOperand(MINext, AMDGPU::OpName::vaddr); in promoteConstantOffsetToImm()