114     InstClassEnum InstClass;  member
174       return (InstClass == MIMG) ? DMask < Other.DMask : Offset < Other.Offset;  in operator <()
542   assert(CI.InstClass == Paired.InstClass);  in getCommonInstClass()
544   if ((CI.InstClass == FLAT_LOAD || CI.InstClass == FLAT_STORE) &&  in getCommonInstClass()
546     return (CI.InstClass == FLAT_STORE) ? GLOBAL_STORE : GLOBAL_LOAD;  in getCommonInstClass()
548   return CI.InstClass;  in getCommonInstClass()
645   InstClass = getInstClass(Opc, *LSO.TII);  in setMI()
647   if (InstClass == UNKNOWN)  in setMI()
652   switch (InstClass) {  in setMI()
671   if (InstClass == MIMG) {  in setMI()
680   if (InstClass == TBUFFER_LOAD || InstClass == TBUFFER_STORE)  in setMI()
685   if ((InstClass == DS_READ) || (InstClass == DS_WRITE)) {  in setMI()
687   } else if (InstClass != MIMG) {  in setMI()
797   assert(CI.InstClass == MIMG);  in dmasksCanBeCombined()
870   assert(CI.InstClass != MIMG);  in offsetsCanBeCombined()
881   if (CI.InstClass == TBUFFER_LOAD || CI.InstClass == TBUFFER_STORE) {  in offsetsCanBeCombined()
911   if ((CI.InstClass != DS_READ) && (CI.InstClass != DS_WRITE)) {  in offsetsCanBeCombined()
980   switch (CI.InstClass) {  in widthsFit()
1022   if (CI.InstClass == UNKNOWN || Paired.InstClass == UNKNOWN)  in checkAndPrepareMerge()
1024   assert(CI.InstClass == Paired.InstClass);  in checkAndPrepareMerge()
1032   if (CI.InstClass == MIMG) {  in checkAndPrepareMerge()
1065   if (CI.InstClass == DS_READ || CI.InstClass == DS_WRITE)  in checkAndPrepareMerge()
1604     assert(CI.InstClass == BUFFER_LOAD || CI.InstClass == BUFFER_STORE);  in getNewOpcode()
1702   assert((CI.InstClass != MIMG || (countPopulation(CI.DMask | Paired.DMask) ==  in getSubRegIdxs()
1734   if (CI.InstClass == S_BUFFER_LOAD_IMM) {  in getTargetRegisterClass()
2124     if (AddrList.front().InstClass == CI.InstClass &&  in addInstToMergeableList()
2164     const InstClassEnum InstClass = getInstClass(MI.getOpcode(), *TII);  in collectMergeableInsts()  local
2165     if (InstClass == UNKNOWN)  in collectMergeableInsts()
2181     if (CI.InstClass == DS_WRITE && CI.IsAGPR) {  in collectMergeableInsts()
2292     switch (CI.InstClass) {  in optimizeInstsWithSameBaseAddr()