1151       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
1165       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
1208       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32  in insertVectorSelect()
1211       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
1226       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32  in insertVectorSelect()
1229       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32  in insertVectorSelect()
1940     unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64;  in expandPostRAPseudo()
1941     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in expandPostRAPseudo()
1956     unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64;  in expandPostRAPseudo()
1957     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in expandPostRAPseudo()
2125     MI.setDesc(get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32  in expandPostRAPseudo()
2132     const unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in expandPostRAPseudo()
2133     const unsigned WQMOp = ST.isWave32() ? AMDGPU::S_WQM_B32 : AMDGPU::S_WQM_B64;  in expandPostRAPseudo()
2134     const unsigned MovOp = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in expandPostRAPseudo()
2145     MI.setDesc(get(ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64));  in expandPostRAPseudo()
5481   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in emitLoadSRsrcFromVGPRLoop()
5483       ST.isWave32() ? AMDGPU::S_AND_SAVEEXEC_B32 : AMDGPU::S_AND_SAVEEXEC_B64;  in emitLoadSRsrcFromVGPRLoop()
5485       ST.isWave32() ? AMDGPU::S_XOR_B32_term : AMDGPU::S_XOR_B64_term;  in emitLoadSRsrcFromVGPRLoop()
5487       ST.isWave32() ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;  in emitLoadSRsrcFromVGPRLoop()
5600   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in loadSRsrcFromVGPR()
5601   unsigned MovExecOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;  in loadSRsrcFromVGPR()
6186         Register EXEC = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;  in moveToVALU()
6187         unsigned Opc = ST.isWave32() ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;  in moveToVALU()
7745   if (!ST.isWave32())  in fixImplicitOperands()
8167                    get(ST.isWave32() ? AMDGPU::S_MOV_B32_term  in createPHISourceCopy()
8177 bool llvm::SIInstrInfo::isWave32() const { return ST.isWave32(); }  in isWave32()  function in llvm::SIInstrInfo