1137     Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1150       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1164       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1180       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1194       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1206       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1207       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1224       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1225       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1255   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertEQ()
1268   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertNE()
2194       auto Tmp = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in expandMovDPP64()
2402   Register PCReg = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in insertIndirectBranch()
2845     Register DstElt = MRI.createVirtualRegister(EltRC);  in insertSelect()
4871   Register Reg = MRI.createVirtualRegister(VRC);  in legalizeOpWithMove()
4886   Register SubReg = MRI.createVirtualRegister(SubRC);  in buildExtractSubReg()
4898   Register NewSuperReg = MRI.createVirtualRegister(SuperRC);  in buildExtractSubReg()
5095       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5101       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5127     Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5199       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
5205       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
5272   Register DstReg = MRI.createVirtualRegister(SRC);  in readlaneVGPRToSGPR()
5277     Register NewSrcReg = MRI.createVirtualRegister(VRC);  in readlaneVGPRToSGPR()
5293     Register SGPR = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in readlaneVGPRToSGPR()
5444   Register DstReg = MRI.createVirtualRegister(DstRC);  in legalizeGenericOperand()
5504     Register CurRegLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadSRsrcFromVGPRLoop()
5505     Register CurRegHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadSRsrcFromVGPRLoop()
5519     Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_64RegClass);  in emitLoadSRsrcFromVGPRLoop()
5526     Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadSRsrcFromVGPRLoop()
5539       Register AndReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadSRsrcFromVGPRLoop()
5548   Register SRsrc = MRI.createVirtualRegister(SRsrcRC);  in emitLoadSRsrcFromVGPRLoop()
5562   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadSRsrcFromVGPRLoop()
5604   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in loadSRsrcFromVGPR()
5681   Register Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in extractRsrcPtr()
5682   Register SRsrcFormatLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
5683   Register SRsrcFormatHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
5684   Register NewSRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass);  in extractRsrcPtr()
5926       Register NewVAddrLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
5927       Register NewVAddrHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
5928       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
5931       Register CondReg0 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
5932       Register CondReg1 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
5971       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
6245         Register NewCarryReg = MRI.createVirtualRegister(CarryRC);  in moveToVALU()
6252       Register DestReg = MRI.createVirtualRegister(RI.getEquivalentVGPRClass(  in moveToVALU()
6282       Register DestReg = MRI.createVirtualRegister(NewRC);  in moveToVALU()
6320         Register CondReg = MRI.createVirtualRegister(RI.getWaveMaskRegClass());  in moveToVALU()
6428       NewDstReg = MRI.createVirtualRegister(NewDstRC);  in moveToVALU()
6456     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveScalarAddSub()
6509   Register CopySCC = MRI.createVirtualRegister(TC);  in lowerSelect()
6541   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerSelect()
6565   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
6566   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
6595     Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarXnor()
6615     Register Temp = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
6616     Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
6660   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
6661   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
6689   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
6690   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
6732   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
6738   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
6744   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitUnaryOp()
6772   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitAddSub()
6773   Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitAddSub()
6774   Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitAddSub()
6776   Register CarryReg = MRI.createVirtualRegister(CarryRC);  in splitScalar64BitAddSub()
6777   Register DeadCarryReg = MRI.createVirtualRegister(CarryRC);  in splitScalar64BitAddSub()
6873   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
6878   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
6883   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitBinaryOp()
6914   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in splitScalar64BitXnor()
6930   Register NewDest = MRI.createVirtualRegister(DestRC);  in splitScalar64BitXnor()
6957   Register MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
6958   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
6997     Register MidRegLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
6998     Register MidRegHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
6999     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
7022   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
7023   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
7079   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7087     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7088     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7106     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7116     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7127     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7128     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7552     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformIfRegion()
7579     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
7580     Register BackEdgeReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
7587         Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
7695   Register UnusedCarry = MRI.createVirtualRegister(RI.getBoolRC());  in getAddNoCarry()
8479   Register Undef = MRI.createVirtualRegister(  in enforceOperandRCAlignment()
8483       MRI.createVirtualRegister(IsAGPR ? &AMDGPU::AReg_64_Align2RegClass  in enforceOperandRCAlignment()