676     int16_t SubIdx = BaseIndices[Idx];  in expandSGPRCopy()  local
677     Register Reg = RI.getSubReg(DestReg, SubIdx);  in expandSGPRCopy()
681     Register Src = RI.getSubReg(SrcReg, SubIdx);  in expandSGPRCopy()
686       unsigned Channel = RI.getChannelFromSubReg(SubIdx);  in expandSGPRCopy()
687       SubIdx = RI.getSubRegFromChannel(Channel, 2);  in expandSGPRCopy()
692     LastMI = BuildMI(MBB, I, DL, TII.get(Opcode), RI.getSubReg(DestReg, SubIdx))  in expandSGPRCopy()
693                  .addReg(RI.getSubReg(SrcReg, SubIdx))  in expandSGPRCopy()
1002     unsigned SubIdx;  in copyPhysReg()  local
1004       SubIdx = SubIndices[Idx];  in copyPhysReg()
1006       SubIdx = SubIndices[SubIndices.size() - Idx - 1];  in copyPhysReg()
1013       indirectCopyToAGPR(*this, MBB, MI, DL, RI.getSubReg(DestReg, SubIdx),  in copyPhysReg()
1014                          RI.getSubReg(SrcReg, SubIdx), UseKill, *RS,  in copyPhysReg()
1017       Register DstSubReg = RI.getSubReg(DestReg, SubIdx);  in copyPhysReg()
1018       Register SrcSubReg = RI.getSubReg(SrcReg, SubIdx);  in copyPhysReg()
1035         BuildMI(MBB, MI, DL, get(Opcode), RI.getSubReg(DestReg, SubIdx))  in copyPhysReg()
1036         .addReg(RI.getSubReg(SrcReg, SubIdx));  in copyPhysReg()
2848     unsigned SubIdx = SubIndices[Idx];  in insertSelect()  local
2854         .addReg(FalseReg, 0, SubIdx)  in insertSelect()
2855         .addReg(TrueReg, 0, SubIdx);  in insertSelect()
2859         .addReg(TrueReg, 0, SubIdx)  in insertSelect()
2860         .addReg(FalseReg, 0, SubIdx);  in insertSelect()
2867        .addImm(SubIdx);  in insertSelect()
4881                                          unsigned SubIdx,  in buildExtractSubReg()  argument
4890       .addReg(SuperReg.getReg(), 0, SubIdx);  in buildExtractSubReg()
4904     .addReg(NewSuperReg, 0, SubIdx);  in buildExtractSubReg()
4914   unsigned SubIdx,  in buildExtractSubRegOrImm()  argument
4917     if (SubIdx == AMDGPU::sub0)  in buildExtractSubRegOrImm()
4919     if (SubIdx == AMDGPU::sub1)  in buildExtractSubRegOrImm()
4926                                        SubIdx, SubRC);  in buildExtractSubRegOrImm()