298     const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps,  in getMemOperandsWithOffsetWidth()  argument
301   if (!LdSt.mayLoadOrStore())  in getMemOperandsWithOffsetWidth()
304   unsigned Opc = LdSt.getOpcode();  in getMemOperandsWithOffsetWidth()
309   if (isDS(LdSt)) {  in getMemOperandsWithOffsetWidth()
310     BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::addr);  in getMemOperandsWithOffsetWidth()
311     OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset);  in getMemOperandsWithOffsetWidth()
325       Width = getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()
331           getNamedOperand(LdSt, AMDGPU::OpName::offset0);  in getMemOperandsWithOffsetWidth()
333           getNamedOperand(LdSt, AMDGPU::OpName::offset1);  in getMemOperandsWithOffsetWidth()
344       if (LdSt.mayLoad())  in getMemOperandsWithOffsetWidth()
345         EltSize = TRI->getRegSizeInBits(*getOpRegClass(LdSt, 0)) / 16;  in getMemOperandsWithOffsetWidth()
347         assert(LdSt.mayStore());  in getMemOperandsWithOffsetWidth()
349         EltSize = TRI->getRegSizeInBits(*getOpRegClass(LdSt, Data0Idx)) / 8;  in getMemOperandsWithOffsetWidth()
361         Width = getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()
363         Width += getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()
365         Width = getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()
371   if (isMUBUF(LdSt) || isMTBUF(LdSt)) {  in getMemOperandsWithOffsetWidth()
372     const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc);  in getMemOperandsWithOffsetWidth()
376     BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::vaddr);  in getMemOperandsWithOffsetWidth()
380         getNamedOperand(LdSt, AMDGPU::OpName::offset);  in getMemOperandsWithOffsetWidth()
383         getNamedOperand(LdSt, AMDGPU::OpName::soffset);  in getMemOperandsWithOffsetWidth()
396     Width = getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()
400   if (isMIMG(LdSt)) {  in getMemOperandsWithOffsetWidth()
402     BaseOps.push_back(&LdSt.getOperand(SRsrcIdx));  in getMemOperandsWithOffsetWidth()
407         BaseOps.push_back(&LdSt.getOperand(I));  in getMemOperandsWithOffsetWidth()
409       BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr));  in getMemOperandsWithOffsetWidth()
414     Width = getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()
418   if (isSMRD(LdSt)) {  in getMemOperandsWithOffsetWidth()
419     BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::sbase);  in getMemOperandsWithOffsetWidth()
423     OffsetOp = getNamedOperand(LdSt, AMDGPU::OpName::offset);  in getMemOperandsWithOffsetWidth()
427     Width = getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()
431   if (isFLAT(LdSt)) {  in getMemOperandsWithOffsetWidth()
433     BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::vaddr);  in getMemOperandsWithOffsetWidth()
436     BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::saddr);  in getMemOperandsWithOffsetWidth()
439     Offset = getNamedOperand(LdSt, AMDGPU::OpName::offset)->getImm();  in getMemOperandsWithOffsetWidth()
446     Width = getOpSize(LdSt, DataOpIdx);  in getMemOperandsWithOffsetWidth()