Lines Matching refs:BaseOps
298 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
319 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
355 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
375 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth()
378 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
386 BaseOps.push_back(SOffset); in getMemOperandsWithOffsetWidth()
402 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx)); in getMemOperandsWithOffsetWidth()
407 BaseOps.push_back(&LdSt.getOperand(I)); in getMemOperandsWithOffsetWidth()
409 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr)); in getMemOperandsWithOffsetWidth()
422 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
435 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
438 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()