SIISelLowering.h - OpenGrok cross reference for /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/SIISelLowering.h

Lines Matching refs:SDValue
48   SDValue lowerKernArgParameterPtr(SelectionDAG &DAG, const SDLoc &SL,
49                                    SDValue Chain, uint64_t Offset) const;
50   SDValue getImplicitArgPtr(SelectionDAG &DAG, const SDLoc &SL) const;
51   SDValue getLDSKernelId(SelectionDAG &DAG, const SDLoc &SL) const;
52   SDValue lowerKernargMemParameter(SelectionDAG &DAG, EVT VT, EVT MemVT,
53                                    const SDLoc &SL, SDValue Chain,
57   SDValue loadImplicitKernelArgument(SelectionDAG &DAG, MVT VT, const SDLoc &DL,
61   SDValue lowerStackParameter(SelectionDAG &DAG, CCValAssign &VA,
62                               const SDLoc &SL, SDValue Chain,
64   SDValue getPreloadedValue(SelectionDAG &DAG,
69   SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
71   SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
73   SDValue lowerImage(SDValue Op, const AMDGPU::ImageDimIntrinsicInfo *Intr,
75   SDValue lowerSBuffer(EVT VT, SDLoc DL, SDValue Rsrc, SDValue Offset,
76                        SDValue CachePolicy, SelectionDAG &DAG) const;
78   SDValue lowerRawBufferAtomicIntrin(SDValue Op, SelectionDAG &DAG,
80   SDValue lowerStructBufferAtomicIntrin(SDValue Op, SelectionDAG &DAG,
83   SDValue lowerWorkitemID(SelectionDAG &DAG, SDValue Op, unsigned Dim,
86   SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
87   SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
88   SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
96   std::pair<SDValue, SDValue> splitBufferOffsets(SDValue Offset,
99   SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const;
100   SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
101   SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
102   SDValue lowerFastUnsafeFDIV(SDValue Op, SelectionDAG &DAG) const;
103   SDValue lowerFastUnsafeFDIV64(SDValue Op, SelectionDAG &DAG) const;
104   SDValue lowerFDIV_FAST(SDValue Op, SelectionDAG &DAG) const;
105   SDValue LowerFDIV16(SDValue Op, SelectionDAG &DAG) const;
106   SDValue LowerFDIV32(SDValue Op, SelectionDAG &DAG) const;
107   SDValue LowerFDIV64(SDValue Op, SelectionDAG &DAG) const;
108   SDValue LowerFDIV(SDValue Op, SelectionDAG &DAG) const;
109   SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
110   SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const;
111   SDValue LowerATOMIC_CMP_SWAP(SDValue Op, SelectionDAG &DAG) const;
112   SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
113   SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
114   SDValue adjustLoadValueType(unsigned Opcode, MemSDNode *M,
115                               SelectionDAG &DAG, ArrayRef<SDValue> Ops,
118   SDValue lowerIntrinsicLoad(MemSDNode *M, bool IsFormat, SelectionDAG &DAG,
119                              ArrayRef<SDValue> Ops) const;
123   SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
124                               ArrayRef<SDValue> Ops, EVT MemVT,
127   SDValue handleD16VData(SDValue VData, SelectionDAG &DAG,
132   SDValue getFPExtOrFPRound(SelectionDAG &DAG,
133                             SDValue Op,
137   SDValue convertArgType(
138     SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Val,
142   SDValue lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;
143   SDValue lowerFMINNUM_FMAXNUM(SDValue Op, SelectionDAG &DAG) const;
144   SDValue lowerXMULO(SDValue Op, SelectionDAG &DAG) const;
145   SDValue lowerXMUL_LOHI(SDValue Op, SelectionDAG &DAG) const;
147   SDValue getSegmentAperture(unsigned AS, const SDLoc &DL,
150   SDValue lowerADDRSPACECAST(SDValue Op, SelectionDAG &DAG) const;
151   SDValue lowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
152   SDValue lowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
153   SDValue lowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
154   SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
155   SDValue lowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
156   SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
158   SDValue lowerTRAP(SDValue Op, SelectionDAG &DAG) const;
159   SDValue lowerTrapEndpgm(SDValue Op, SelectionDAG &DAG) const;
160   SDValue lowerTrapHsaQueuePtr(SDValue Op, SelectionDAG &DAG) const;
161   SDValue lowerTrapHsa(SDValue Op, SelectionDAG &DAG) const;
162   SDValue lowerDEBUGTRAP(SDValue Op, SelectionDAG &DAG) const;
166   SDValue performUCharToFloatCombine(SDNode *N,
168   SDValue performSHLPtrCombine(SDNode *N,
173   SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const;
175   SDValue splitBinaryBitConstantOp(DAGCombinerInfo &DCI, const SDLoc &SL,
176                                    unsigned Opc, SDValue LHS,
179   SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
180   SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
181   SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const;
182   SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const;
183   SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const;
184   SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const;
185   SDValue getCanonicalConstantFP(SelectionDAG &DAG, const SDLoc &SL, EVT VT,
187   SDValue performFCanonicalizeCombine(SDNode *N, DAGCombinerInfo &DCI) const;
189   SDValue performFPMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
190                                   SDValue Op0, SDValue Op1) const;
191   SDValue performIntMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
192                                    SDValue Op0, SDValue Op1, bool Signed) const;
193   SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const;
194   SDValue performFMed3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
195   SDValue performCvtPkRTZCombine(SDNode *N, DAGCombinerInfo &DCI) const;
196   SDValue performExtractVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
197   SDValue performInsertVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
199   SDValue reassociateScalarOps(SDNode *N, SelectionDAG &DAG) const;
202   SDValue tryFoldToMad64_32(SDNode *N, DAGCombinerInfo &DCI) const;
203   SDValue performAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
204   SDValue performAddCarrySubCarryCombine(SDNode *N, DAGCombinerInfo &DCI) const;
205   SDValue performSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
206   SDValue performFAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
207   SDValue performFSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
208   SDValue performFMACombine(SDNode *N, DAGCombinerInfo &DCI) const;
209   SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const;
210   SDValue performCvtF32UByteNCombine(SDNode *N, DAGCombinerInfo &DCI) const;
211   SDValue performClampCombine(SDNode *N, DAGCombinerInfo &DCI) const;
212   SDValue performRcpCombine(SDNode *N, DAGCombinerInfo &DCI) const;
248   void setBufferOffsets(SDValue CombinedOffset, SelectionDAG &DAG,
249                         SDValue *Offsets, Align Alignment = Align(4)) const;
252   SDValue handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT, SDLoc DL,
253                                      ArrayRef<SDValue> Ops, MemSDNode *M) const;
256   SDValue handleByteShortBufferStores(SelectionDAG &DAG, EVT VDataType,
257                                       SDLoc DL, SDValue Ops[],
338   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
342                                SmallVectorImpl<SDValue> &InVals) const override;
349   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
351                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
358     SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
359     SmallVectorImpl<SDValue> &MemOpChains,
360     SDValue Chain) const;
362   SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
366                           SmallVectorImpl<SDValue> &InVals, bool isThisReturn,
367                           SDValue ThisVal) const;
372     SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg,
374     const SmallVectorImpl<SDValue> &OutVals,
377   SDValue LowerCall(CallLoweringInfo &CLI,
378                     SmallVectorImpl<SDValue> &InVals) const override;
380   SDValue lowerDYNAMIC_STACKALLOCImpl(SDValue Op, SelectionDAG &DAG) const;
381   SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
398   bool hasAtomicFaddRtnForTy(SDValue &Op) const;
413   SDValue splitUnaryVectorOp(SDValue Op, SelectionDAG &DAG) const;
414   SDValue splitBinaryVectorOp(SDValue Op, SelectionDAG &DAG) const;
415   SDValue splitTernaryVectorOp(SDValue Op, SelectionDAG &DAG) const;
416   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
418   void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
421   SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
430                                 SDValue Ptr) const;
431   MachineSDNode *buildRSRC(SelectionDAG &DAG, const SDLoc &DL, SDValue Ptr,
437   void LowerAsmOperandForConstraint(SDValue Op,
439                                     std::vector<SDValue> &Ops,
441   bool getAsmOperandConstVal(SDValue Op, uint64_t &Val) const;
442   bool checkAsmConstraintVal(SDValue Op,
445   bool checkAsmConstraintValA(SDValue Op,
448   SDValue copyToM0(SelectionDAG &DAG, SDValue Chain, const SDLoc &DL,
449                    SDValue V) const;
470   bool isReassocProfitable(SelectionDAG &DAG, SDValue N0,
471                            SDValue N1) const override;
473   bool isCanonicalized(SelectionDAG &DAG, SDValue Op,
480   bool isKnownNeverNaNForTargetNode(SDValue Op,