Lines Matching refs:SDNode
164 SDNode *adjustWritemask(MachineSDNode *&N, SelectionDAG &DAG) const;
166 SDValue performUCharToFloatCombine(SDNode *N,
168 SDValue performSHLPtrCombine(SDNode *N,
179 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const;
180 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const;
181 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const;
182 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const;
183 SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const;
184 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const;
187 SDValue performFCanonicalizeCombine(SDNode *N, DAGCombinerInfo &DCI) const;
193 SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const;
194 SDValue performFMed3Combine(SDNode *N, DAGCombinerInfo &DCI) const;
195 SDValue performCvtPkRTZCombine(SDNode *N, DAGCombinerInfo &DCI) const;
196 SDValue performExtractVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
197 SDValue performInsertVectorEltCombine(SDNode *N, DAGCombinerInfo &DCI) const;
199 SDValue reassociateScalarOps(SDNode *N, SelectionDAG &DAG) const;
201 const SDNode *N0, const SDNode *N1) const;
202 SDValue tryFoldToMad64_32(SDNode *N, DAGCombinerInfo &DCI) const;
203 SDValue performAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
204 SDValue performAddCarrySubCarryCombine(SDNode *N, DAGCombinerInfo &DCI) const;
205 SDValue performSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
206 SDValue performFAddCombine(SDNode *N, DAGCombinerInfo &DCI) const;
207 SDValue performFSubCombine(SDNode *N, DAGCombinerInfo &DCI) const;
208 SDValue performFMACombine(SDNode *N, DAGCombinerInfo &DCI) const;
209 SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const;
210 SDValue performCvtF32UByteNCombine(SDNode *N, DAGCombinerInfo &DCI) const;
211 SDValue performClampCombine(SDNode *N, DAGCombinerInfo &DCI) const;
212 SDValue performRcpCombine(SDNode *N, DAGCombinerInfo &DCI) const;
217 unsigned isCFIntrinsic(const SDNode *Intr) const;
242 bool shouldExpandVectorDynExt(SDNode *N) const;
312 bool isMemOpUniform(const SDNode *N) const;
313 bool isMemOpHasNoClobberedMemOperand(const SDNode *N) const;
410 bool isFMADLegal(const SelectionDAG &DAG, const SDNode *N) const override;
418 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
421 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
422 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override;
425 SDNode *Node) const override;
427 SDNode *legalizeTargetIndependentNode(SDNode *Node, SelectionDAG &DAG) const;
465 bool isSDNodeSourceOfDivergence(const SDNode *N,
468 bool hasMemSDNodeUser(SDNode *N) const;