Lines Matching refs:lowerRawBufferAtomicIntrin
7138 SDValue SITargetLowering::lowerRawBufferAtomicIntrin(SDValue Op, in lowerRawBufferAtomicIntrin() function in SITargetLowering
7544 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_FADD); in LowerINTRINSIC_W_CHAIN()
7548 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_FMIN); in LowerINTRINSIC_W_CHAIN()
7552 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_FMAX); in LowerINTRINSIC_W_CHAIN()
7556 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SWAP); in LowerINTRINSIC_W_CHAIN()
7558 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_ADD); in LowerINTRINSIC_W_CHAIN()
7560 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SUB); in LowerINTRINSIC_W_CHAIN()
7562 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SMIN); in LowerINTRINSIC_W_CHAIN()
7564 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_UMIN); in LowerINTRINSIC_W_CHAIN()
7566 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SMAX); in LowerINTRINSIC_W_CHAIN()
7568 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_UMAX); in LowerINTRINSIC_W_CHAIN()
7570 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_AND); in LowerINTRINSIC_W_CHAIN()
7572 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_OR); in LowerINTRINSIC_W_CHAIN()
7574 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_XOR); in LowerINTRINSIC_W_CHAIN()
7576 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_INC); in LowerINTRINSIC_W_CHAIN()
7578 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_DEC); in LowerINTRINSIC_W_CHAIN()