Lines Matching refs:getVTList

3327   SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);  in LowerCall()
4704 return DAG.getNode(Opc, DL, Op.getNode()->getVTList(), Op->getOperand(0)); in LowerOperation()
4821 SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other); in adjustLoadValueType()
4856 return getMemIntrinsicNode(Opc, DL, M->getVTList(), Ops, IntVT, in lowerIntrinsicLoad()
4861 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad()
5209 SDNode *Result = DAG.getNode(CFNode, DL, DAG.getVTList(Res), Ops).getNode(); in LowerBRCOND()
5226 SDValue NewBR = DAG.getNode(ISD::BR, DL, BR->getVTList(), Ops); in LowerBRCOND()
6696 AMDGPUISD::SBUFFER_LOAD, DL, DAG.getVTList(WidenedVT), Ops, WidenedVT, in lowerSBuffer()
6704 DAG.getVTList(VT), Ops, VT, MMO); in lowerSBuffer()
6721 SDVTList VTList = DAG.getVTList({LoadVT, MVT::Glue}); in lowerSBuffer()
6997 return DAG.getNode(AMDGPUISD::DIV_SCALE, DL, Op->getVTList(), Src0, in LowerINTRINSIC_WO_CHAIN()
7161 return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT, in lowerRawBufferAtomicIntrin()
7196 return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT, in lowerStructBufferAtomicIntrin()
7257 M->getVTList(), Ops, M->getMemoryVT(), in LowerINTRINSIC_W_CHAIN()
7301 return DAG.getMemIntrinsicNode(Opc, SDLoc(Op), M->getVTList(), Ops, in LowerINTRINSIC_W_CHAIN()
7339 return getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, IntVT, in LowerINTRINSIC_W_CHAIN()
7407 Op->getVTList(), Ops, LoadVT, M->getMemOperand(), in LowerINTRINSIC_W_CHAIN()
7431 Op->getVTList(), Ops, LoadVT, M->getMemOperand(), in LowerINTRINSIC_W_CHAIN()
7455 Op->getVTList(), Ops, LoadVT, M->getMemOperand(), in LowerINTRINSIC_W_CHAIN()
7540 return DAG.getMemIntrinsicNode(Opcode, DL, Op->getVTList(), Ops, VT, in LowerINTRINSIC_W_CHAIN()
7631 Op->getVTList(), Ops, VT, M->getMemOperand()); in LowerINTRINSIC_W_CHAIN()
7652 Op->getVTList(), Ops, VT, M->getMemOperand()); in LowerINTRINSIC_W_CHAIN()
7673 Op->getVTList(), Ops, VT, M->getMemOperand()); in LowerINTRINSIC_W_CHAIN()
7799 auto *NewNode = DAG.getMachineNode(Opcode, DL, M->getVTList(), Ops); in LowerINTRINSIC_W_CHAIN()
7831 DAG.getVTList(VT, MVT::Other), Ops, in LowerINTRINSIC_W_CHAIN()
7848 M->getVTList(), Ops, M->getMemoryVT(), in LowerINTRINSIC_W_CHAIN()
7881 SDVTList WidenedVTList = DAG.getVTList(WidenedVT, VTList.VTs[1]); in getMemIntrinsicNode()
8006 return SDValue(DAG.getMachineNode(Opc, DL, Op->getVTList(), Ops), 0); in LowerINTRINSIC_VOID()
8043 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, in LowerINTRINSIC_VOID()
8068 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, in LowerINTRINSIC_VOID()
8093 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, in LowerINTRINSIC_VOID()
8130 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, in LowerINTRINSIC_VOID()
8176 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, in LowerINTRINSIC_VOID()
8224 return DAG.getMemIntrinsicNode(Opc, DL, Op->getVTList(), Ops, in LowerINTRINSIC_VOID()
8301 auto Load = DAG.getMachineNode(Opc, DL, M->getVTList(), Ops); in LowerINTRINSIC_VOID()
8376 auto Load = DAG.getMachineNode(Opc, DL, Op->getVTList(), Ops); in LowerINTRINSIC_VOID()
8493 SDVTList ResList = DAG.getVTList(MVT::i32, MVT::Other); in handleByteShortBufferLoads()
8516 return DAG.getMemIntrinsicNode(Opc, DL, M->getVTList(), OpsRef, VDataType, in handleByteShortBufferStores()
8884 SDVTList VTList = DAG.getVTList(VT, MVT::Other, MVT::Glue); in getFPBinOp()
8906 SDVTList VTList = DAG.getVTList(VT, MVT::Other, MVT::Glue); in getFPTernOp()
9003 SDVTList ScaleVT = DAG.getVTList(MVT::f32, MVT::i1); in LowerFDIV32()
9028 SDVTList BindParamVTs = DAG.getVTList(MVT::Other, MVT::Glue); in LowerFDIV32()
9112 SDVTList ScaleVT = DAG.getVTList(MVT::f64, MVT::i1); in LowerFDIV64()
9314 return DAG.getMemIntrinsicNode(AMDGPUISD::ATOMIC_CMP_SWAP, DL, Op->getVTList(), in LowerATOMIC_CMP_SWAP()
9946 SDVTList ResList = DCI.DAG.getVTList(MVT::i32, in performSignExtendInRegCombine()
10844 SDVTList VTs = DAG.getVTList(MVT::i64, MVT::i1); in getMad64_32()
11018 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1); in performAddCombine()
11028 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), RHS->getVTList(), Args); in performAddCombine()
11059 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1); in performSubCombine()
11072 return DAG.getNode(ISD::SUBCARRY, SDLoc(N), LHS->getVTList(), Args); in performSubCombine()
11097 return DAG.getNode(Opc, SDLoc(N), N->getVTList(), Args); in performAddCarrySubCarryCombine()
11682 DAG.getVTList(ResultVT, MVT::Other) : DAG.getVTList(ResultVT); in adjustWritemask()
11849 return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops); in PostISelFolding()