Lines Matching refs:VTList
4821 SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other); in adjustLoadValueType() local
4826 VTList, Ops, M->getMemoryVT(), in adjustLoadValueType()
4861 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad() local
4862 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad()
6721 SDVTList VTList = DAG.getVTList({LoadVT, MVT::Glue}); in lowerSBuffer() local
6741 Loads.push_back(getMemIntrinsicNode(AMDGPUISD::BUFFER_LOAD, DL, VTList, Ops, in lowerSBuffer()
7864 SDVTList VTList, in getMemIntrinsicNode() argument
7868 EVT VT = VTList.VTs[0]; in getMemIntrinsicNode()
7880 assert(VTList.NumVTs == 2); in getMemIntrinsicNode()
7881 SDVTList WidenedVTList = DAG.getVTList(WidenedVT, VTList.VTs[1]); in getMemIntrinsicNode()
8884 SDVTList VTList = DAG.getVTList(VT, MVT::Other, MVT::Glue); in getFPBinOp() local
8892 return DAG.getNode(Opcode, SL, VTList, in getFPBinOp()
8906 SDVTList VTList = DAG.getVTList(VT, MVT::Other, MVT::Glue); in getFPTernOp() local
8914 return DAG.getNode(Opcode, SL, VTList, in getFPTernOp()
11018 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1); in performAddCombine() local
11021 return DAG.getNode(Opc, SL, VTList, Args); in performAddCombine()
11059 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1); in performSubCombine() local
11062 return DAG.getNode(Opc, SL, VTList, Args); in performSubCombine()