Lines Matching refs:Ld
8540 SDValue SITargetLowering::widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const { in widenLoad() argument
8542 if (Ld->getAlign() < Align(4) || Ld->isDivergent()) in widenLoad()
8546 unsigned AS = Ld->getAddressSpace(); in widenLoad()
8549 (AS != AMDGPUAS::GLOBAL_ADDRESS || !Ld->isInvariant())) in widenLoad()
8555 EVT MemVT = Ld->getMemoryVT(); in widenLoad()
8560 SDLoc SL(Ld); in widenLoad()
8562 assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) && in widenLoad()
8566 SDValue Ptr = Ld->getBasePtr(); in widenLoad()
8568 ISD::UNINDEXED, ISD::NON_EXTLOAD, MVT::i32, SL, Ld->getChain(), Ptr, in widenLoad()
8569 Ld->getOffset(), Ld->getPointerInfo(), MVT::i32, Ld->getAlign(), in widenLoad()
8570 Ld->getMemOperand()->getFlags(), Ld->getAAInfo(), in widenLoad()
8575 assert(Ld->getExtensionType() == ISD::NON_EXTLOAD && in widenLoad()
8581 if (Ld->getExtensionType() == ISD::SEXTLOAD) { in widenLoad()
8584 } else if (Ld->getExtensionType() == ISD::ZEXTLOAD || in widenLoad()
8585 Ld->getExtensionType() == ISD::NON_EXTLOAD) { in widenLoad()
8588 assert(Ld->getExtensionType() == ISD::EXTLOAD); in widenLoad()
8591 EVT VT = Ld->getValueType(0); in widenLoad()
8598 Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT); in widenLoad()