Lines Matching refs:IntrID
952 unsigned IntrID) const { in getTgtMemIntrinsic()
958 AMDGPU::lookupRsrcIntrinsic(IntrID)) { in getTgtMemIntrinsic()
960 (Intrinsic::ID)IntrID); in getTgtMemIntrinsic()
982 = AMDGPU::getImageDimIntrinsicInfo(IntrID); in getTgtMemIntrinsic()
1025 switch (IntrID) { in getTgtMemIntrinsic()
1039 switch (IntrID) { in getTgtMemIntrinsic()
1152 if (IntrID == Intrinsic::amdgcn_ds_gws_barrier) in getTgtMemIntrinsic()
7202 unsigned IntrID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); in LowerINTRINSIC_W_CHAIN() local
7205 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
7236 unsigned Instruction = IntrID == Intrinsic::amdgcn_ds_ordered_add ? 0 : 1; in LowerINTRINSIC_W_CHAIN()
7263 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
7279 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
7321 unsigned Opc = (IntrID == Intrinsic::amdgcn_buffer_load) ? in LowerINTRINSIC_W_CHAIN()
7344 const bool IsFormat = IntrID == Intrinsic::amdgcn_raw_buffer_load_format; in LowerINTRINSIC_W_CHAIN()
7364 const bool IsFormat = IntrID == Intrinsic::amdgcn_struct_buffer_load_format; in LowerINTRINSIC_W_CHAIN()
7491 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
7826 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
7854 AMDGPU::getImageDimIntrinsicInfo(IntrID)) in LowerINTRINSIC_W_CHAIN()