Lines Matching refs:Intr
981 const AMDGPU::ImageDimIntrinsicInfo *Intr in getTgtMemIntrinsic() local
984 AMDGPU::getMIMGBaseOpcodeInfo(Intr->BaseOpcode); in getTgtMemIntrinsic()
5112 unsigned SITargetLowering::isCFIntrinsic(const SDNode *Intr) const { in isCFIntrinsic()
5113 if (Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN) { in isCFIntrinsic()
5114 switch (cast<ConstantSDNode>(Intr->getOperand(1))->getZExtValue()) { in isCFIntrinsic()
5167 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND() local
5172 if (Intr->getOpcode() == ISD::SETCC) { in LowerBRCOND()
5174 SetCC = Intr; in LowerBRCOND()
5175 Intr = SetCC->getOperand(0).getNode(); in LowerBRCOND()
5184 unsigned CFNode = isCFIntrinsic(Intr); in LowerBRCOND()
5190 bool HaveChain = Intr->getOpcode() == ISD::INTRINSIC_VOID || in LowerBRCOND()
5191 Intr->getOpcode() == ISD::INTRINSIC_W_CHAIN; in LowerBRCOND()
5203 Ops.append(Intr->op_begin() + (HaveChain ? 2 : 1), Intr->op_end()); in LowerBRCOND()
5206 ArrayRef<EVT> Res(Intr->value_begin() + 1, Intr->value_end()); in LowerBRCOND()
5233 for (unsigned i = 1, e = Intr->getNumValues() - 1; i != e; ++i) { in LowerBRCOND()
5234 SDNode *CopyToReg = findUser(SDValue(Intr, i), ISD::CopyToReg); in LowerBRCOND()
5249 SDValue(Intr, Intr->getNumValues() - 1), in LowerBRCOND()
5250 Intr->getOperand(0)); in LowerBRCOND()
6323 const AMDGPU::ImageDimIntrinsicInfo *Intr, in lowerImage() argument
6329 AMDGPU::getMIMGBaseOpcodeInfo(Intr->BaseOpcode); in lowerImage()
6330 const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfo(Intr->Dim); in lowerImage()
6331 unsigned IntrOpcode = Intr->BaseOpcode; in lowerImage()
6370 cast<ConstantSDNode>(Op.getOperand(ArgOffset + Intr->DMaskIndex)); in lowerImage()
6416 unsigned VAddrEnd = ArgOffset + Intr->VAddrEnd; in lowerImage()
6421 Op.getOperand(ArgOffset + Intr->GradientStart).getSimpleValueType(); in lowerImage()
6426 VAddrVT = Op.getOperand(ArgOffset + Intr->CoordStart).getSimpleValueType(); in lowerImage()
6432 for (unsigned I = Intr->VAddrStart; I < Intr->GradientStart; I++) { in lowerImage()
6434 assert(I == Intr->BiasIndex && "Got unexpected 16-bit extra argument"); in lowerImage()
6442 assert((!IsA16 || Intr->NumBiasArgs == 0 || I != Intr->BiasIndex) && in lowerImage()
6473 AMDGPU::getMIMGG16MappingInfo(Intr->BaseOpcode); in lowerImage()
6482 ArgOffset + Intr->GradientStart, in lowerImage()
6483 ArgOffset + Intr->CoordStart, Intr->NumGradients); in lowerImage()
6485 for (unsigned I = ArgOffset + Intr->GradientStart; in lowerImage()
6486 I < ArgOffset + Intr->CoordStart; I++) in lowerImage()
6493 ArgOffset + Intr->CoordStart, VAddrEnd, in lowerImage()
6497 for (unsigned I = ArgOffset + Intr->CoordStart; I < VAddrEnd; I++) in lowerImage()
6530 cast<ConstantSDNode>(Op.getOperand(ArgOffset + Intr->UnormIndex)); in lowerImage()
6537 SDValue TexFail = Op.getOperand(ArgOffset + Intr->TexFailCtrlIndex); in lowerImage()
6580 Op.getOperand(ArgOffset + Intr->CachePolicyIndex))->getZExtValue(); in lowerImage()
6593 Ops.push_back(Op.getOperand(ArgOffset + Intr->RsrcIndex)); in lowerImage()
6595 Ops.push_back(Op.getOperand(ArgOffset + Intr->SampIndex)); in lowerImage()