162   const TargetRegisterClass *DstRC = DstReg.isVirtual()  in getCopyRegClasses()  local
166   return std::make_pair(SrcRC, DstRC);  in getCopyRegClasses()
170                              const TargetRegisterClass *DstRC,  in isVGPRToSGPRCopy()  argument
172   return SrcRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(DstRC) &&  in isVGPRToSGPRCopy()
177                              const TargetRegisterClass *DstRC,  in isSGPRToVGPRCopy()  argument
179   return DstRC != &AMDGPU::VReg_1RegClass && TRI.isSGPRClass(SrcRC) &&  in isSGPRToVGPRCopy()
180          TRI.hasVectorRegisters(DstRC);  in isSGPRToVGPRCopy()
245   const TargetRegisterClass *SrcRC, *DstRC;  in foldVGPRCopyIntoRegSequence()  local
246   std::tie(SrcRC, DstRC) = getCopyRegClasses(CopyUse, *TRI, MRI);  in foldVGPRCopyIntoRegSequence()
248   if (!isSGPRToVGPRCopy(SrcRC, DstRC, *TRI))  in foldVGPRCopyIntoRegSequence()
259   MRI.setRegClass(DstReg, DstRC);  in foldVGPRCopyIntoRegSequence()
270   bool IsAGPR = TRI->isAGPRClass(DstRC);  in foldVGPRCopyIntoRegSequence()
604         const TargetRegisterClass *SrcRC, *DstRC;  in runOnMachineFunction()  local
605         std::tie(SrcRC, DstRC) = getCopyRegClasses(MI, *TRI, *MRI);  in runOnMachineFunction()
659         if (isSGPRToVGPRCopy(SrcRC, DstRC, *TRI)) {  in runOnMachineFunction()
698         const TargetRegisterClass *DstRC, *Src0RC, *Src1RC;  in runOnMachineFunction()  local
699         DstRC = MRI->getRegClass(MI.getOperand(0).getReg());  in runOnMachineFunction()
702         if (TRI->isSGPRClass(DstRC) &&  in runOnMachineFunction()
903   const TargetRegisterClass *SrcRC, *DstRC;  in lowerSpecialCase()  local
904   std::tie(SrcRC, DstRC) = getCopyRegClasses(MI, *TRI, *MRI);  in lowerSpecialCase()
907   if (!isVGPRToSGPRCopy(SrcRC, DstRC, *TRI))  in lowerSpecialCase()
1035       const TargetRegisterClass *DstRC = TRI->getRegClassForReg(*MRI, DstReg);  in lowerVGPR2SGPRCopies()  local
1038                      TRI->getRegSizeInBits(*DstRC));  in lowerVGPR2SGPRCopies()