29 class AMDGPUAsmBackend : public MCAsmBackend {  class
31   AMDGPUAsmBackend(const Target &T) : MCAsmBackend(support::little) {}  in AMDGPUAsmBackend()  function in __anoneca44c6f0111::AMDGPUAsmBackend
61 void AMDGPUAsmBackend::relaxInstruction(MCInst &Inst,  in relaxInstruction()
70 bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,  in fixupNeedsRelaxation()
80 bool AMDGPUAsmBackend::mayNeedRelaxation(const MCInst &Inst,  in mayNeedRelaxation()
138 void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,  in applyFixup()
165 Optional<MCFixupKind> AMDGPUAsmBackend::getFixupKind(StringRef Name) const {  in getFixupKind()
174 const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(  in getFixupKindInfo()
190 bool AMDGPUAsmBackend::shouldForceRelocation(const MCAssembler &,  in shouldForceRelocation()
196 unsigned AMDGPUAsmBackend::getMinimumNopSize() const {  in getMinimumNopSize()
200 bool AMDGPUAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,  in writeNopData()
226 class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
234       AMDGPUAsmBackend(T), Is64Bit(TT.getArch() == Triple::amdgcn),  in ELFAMDGPUAsmBackend()