74   for (ComponentInfo &Comp : CInfo) {  in checkVOPDRegConstraints()
75     switch (Comp.MI.getOpcode()) {  in checkVOPDRegConstraints()
78       addLiteral(Comp.MI.getOperand(2));  in checkVOPDRegConstraints()
79       Comp.Reg2 = Comp.MI.getOperand(3).getReg();  in checkVOPDRegConstraints()
83       addLiteral(Comp.MI.getOperand(3));  in checkVOPDRegConstraints()
84       Comp.Reg1 = Comp.MI.getOperand(2).getReg();  in checkVOPDRegConstraints()
89       Comp.Reg1 = Comp.MI.getOperand(2).getReg();  in checkVOPDRegConstraints()
90       Comp.Reg2 = Comp.MI.getOperand(0).getReg();  in checkVOPDRegConstraints()
94       Comp.Reg1 = Comp.MI.getOperand(2).getReg();  in checkVOPDRegConstraints()
99       Comp.Reg1 = Comp.MI.getOperand(2).getReg();  in checkVOPDRegConstraints()
103     Comp.Dst = Comp.MI.getOperand(0).getReg();  in checkVOPDRegConstraints()
105     const MachineOperand &Op0 = Comp.MI.getOperand(1);  in checkVOPDRegConstraints()
111         Comp.Reg0 = Op0.getReg();  in checkVOPDRegConstraints()
113       if (!TII.isInlineConstant(Comp.MI, 1))  in checkVOPDRegConstraints()