212       RowMaskOpnd->getImm() == 0xF && BankMaskOpnd->getImm() == 0xF;  in createDPPInst()
267              (0LL == (Mod0->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG))));  in createDPPInst()
268       DPPInst.addImm(Mod0->getImm());  in createDPPInst()
291              (0LL == (Mod1->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG))));  in createDPPInst()
292       DPPInst.addImm(Mod1->getImm());  in createDPPInst()
314              (0LL == (Mod2->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG))));  in createDPPInst()
315       DPPInst.addImm(Mod2->getImm());  in createDPPInst()
333         DPPInst.addImm(ClampOpr->getImm());  in createDPPInst()
343         DPPInst.addImm(OmodOpr->getImm());  in createDPPInst()
349         auto OpSel = OpSelOpr->getImm();  in createDPPInst()
360         auto OpSelHi = OpSelHiOpr->getImm();  in createDPPInst()
375         DPPInst.addImm(NegOpr->getImm());  in createDPPInst()
380         DPPInst.addImm(NegHiOpr->getImm());  in createDPPInst()
415     if (OldOpnd->getImm() == 0)  in isIdentityValue()
422     if (static_cast<uint32_t>(OldOpnd->getImm()) ==  in isIdentityValue()
428     if (static_cast<int32_t>(OldOpnd->getImm()) ==  in isIdentityValue()
434     if (static_cast<int32_t>(OldOpnd->getImm()) ==  in isIdentityValue()
442     if (OldOpnd->getImm() == 1)  in isIdentityValue()
483   return (Imm->getImm() & Mask) == Value;  in hasNoImmOrEqual()
509     if (!AMDGPU::isLegal64BitDPPControl(DppCtrl->getImm())) {  in combineDPPMov()
521   const bool MaskAllLanes = RowMaskOpnd->getImm() == 0xF &&  in combineDPPMov()
522                             BankMaskOpnd->getImm() == 0xF;  in combineDPPMov()
526   bool BoundCtrlZero = BCZOpnd->getImm();  in combineDPPMov()
554     if (OldOpndValue->getImm() == 0) {  in combineDPPMov()
616           FwdSubReg = OrigMI.getOperand(OpNo + 1).getImm();  in combineDPPMov()