Lines Matching refs:AMDGPU
42 (isGFX10Plus() ? AMDGPU::EncValues::SGPR_MAX_GFX10 \
43 : AMDGPU::EncValues::SGPR_MAX_SI)
54 if (!STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding] && !isGFX10Plus()) in AMDGPUDisassembler()
68 int OpIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), NameIdx); in insertNamedMCOperand()
306 unsigned Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0); in IsAGPROperand()
308 return Reg >= AMDGPU::AGPR0 && Reg <= AMDGPU::AGPR255; in IsAGPROperand()
325 uint16_t DataNameIdx = (TSFlags & SIInstrFlags::DS) ? AMDGPU::OpName::data0 in decodeOperand_AVLdSt_Any()
326 : AMDGPU::OpName::vdata; in decodeOperand_AVLdSt_Any()
328 int DataIdx = AMDGPU::getNamedOperandIdx(Opc, DataNameIdx); in decodeOperand_AVLdSt_Any()
330 int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst); in decodeOperand_AVLdSt_Any()
336 int Data2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data1); in decodeOperand_AVLdSt_Any()
415 using namespace llvm::AMDGPU::DPP; in isValidDPP8()
416 int FiIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::fi); in isValidDPP8()
453 else if (AMDGPU::isVOPC64DPP(MI.getOpcode())) in getInstruction()
471 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) { in getInstruction()
474 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::dpp8) in getInstruction()
512 if (STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem]) { in getInstruction()
521 if (STI.getFeatureBits()[AMDGPU::FeatureFmaMixInsts]) { in getInstruction()
543 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) { in getInstruction()
549 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) { in getInstruction()
563 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) { in getInstruction()
588 if (Res && (MI.getOpcode() == AMDGPU::V_MAC_F32_e64_vi || in getInstruction()
589 MI.getOpcode() == AMDGPU::V_MAC_F32_e64_gfx6_gfx7 || in getInstruction()
590 MI.getOpcode() == AMDGPU::V_MAC_F32_e64_gfx10 || in getInstruction()
591 MI.getOpcode() == AMDGPU::V_MAC_LEGACY_F32_e64_gfx6_gfx7 || in getInstruction()
592 MI.getOpcode() == AMDGPU::V_MAC_LEGACY_F32_e64_gfx10 || in getInstruction()
593 MI.getOpcode() == AMDGPU::V_MAC_F16_e64_vi || in getInstruction()
594 MI.getOpcode() == AMDGPU::V_FMAC_F64_e64_gfx90a || in getInstruction()
595 MI.getOpcode() == AMDGPU::V_FMAC_F32_e64_vi || in getInstruction()
596 MI.getOpcode() == AMDGPU::V_FMAC_F32_e64_gfx10 || in getInstruction()
597 MI.getOpcode() == AMDGPU::V_FMAC_F32_e64_gfx11 || in getInstruction()
598 MI.getOpcode() == AMDGPU::V_FMAC_LEGACY_F32_e64_gfx10 || in getInstruction()
599 MI.getOpcode() == AMDGPU::V_FMAC_DX9_ZERO_F32_e64_gfx11 || in getInstruction()
600 MI.getOpcode() == AMDGPU::V_FMAC_F16_e64_gfx10 || in getInstruction()
601 MI.getOpcode() == AMDGPU::V_FMAC_F16_e64_gfx11)) { in getInstruction()
604 AMDGPU::OpName::src2_modifiers); in getInstruction()
609 int CPolPos = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in getInstruction()
610 AMDGPU::OpName::cpol); in getInstruction()
614 AMDGPU::CPol::GLC : 0; in getInstruction()
617 AMDGPU::OpName::cpol); in getInstruction()
626 (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts])) { in getInstruction()
629 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::tfe); in getInstruction()
640 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::swz); in getInstruction()
650 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in getInstruction()
652 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc); in getInstruction()
682 int VDstIn_Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in getInstruction()
683 AMDGPU::OpName::vdst_in); in getInstruction()
694 AMDGPU::OpName::vdst_in); in getInstruction()
699 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::imm); in getInstruction()
711 if (STI.getFeatureBits()[AMDGPU::FeatureGFX11]) { in convertEXPInst()
714 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vm); in convertEXPInst()
715 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::compr); in convertEXPInst()
721 if (MI.getOpcode() == AMDGPU::V_INTERP_P10_F16_F32_inreg_gfx11 || in convertVINTERPInst()
722 MI.getOpcode() == AMDGPU::V_INTERP_P10_RTZ_F16_F32_inreg_gfx11 || in convertVINTERPInst()
723 MI.getOpcode() == AMDGPU::V_INTERP_P2_F16_F32_inreg_gfx11 || in convertVINTERPInst()
724 MI.getOpcode() == AMDGPU::V_INTERP_P2_RTZ_F16_F32_inreg_gfx11) { in convertVINTERPInst()
727 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::op_sel); in convertVINTERPInst()
733 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in convertSDWAInst()
734 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertSDWAInst()
735 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sdst) != -1) in convertSDWAInst()
737 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::clamp); in convertSDWAInst()
738 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in convertSDWAInst()
739 int SDst = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sdst); in convertSDWAInst()
742 insertNamedMCOperand(MI, createRegOperand(AMDGPU::VCC), in convertSDWAInst()
743 AMDGPU::OpName::sdst); in convertSDWAInst()
746 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::omod); in convertSDWAInst()
766 const int ModOps[] = {AMDGPU::OpName::src0_modifiers, in collectVOPModifiers()
767 AMDGPU::OpName::src1_modifiers, in collectVOPModifiers()
768 AMDGPU::OpName::src2_modifiers}; in collectVOPModifiers()
770 int OpIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]); in collectVOPModifiers()
797 AMDGPU::isVOPC64DPP(Opc)) { in convertDPP8Inst()
800 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel) != -1) { in convertDPP8Inst()
803 AMDGPU::OpName::op_sel); in convertDPP8Inst()
807 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0_modifiers) != -1) in convertDPP8Inst()
809 AMDGPU::OpName::src0_modifiers); in convertDPP8Inst()
812 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1_modifiers) != -1) in convertDPP8Inst()
814 AMDGPU::OpName::src1_modifiers); in convertDPP8Inst()
823 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel) != -1) { in convertVOP3DPPInst()
826 AMDGPU::OpName::op_sel); in convertVOP3DPPInst()
836 int VDstIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
837 AMDGPU::OpName::vdst); in convertMIMGInst()
839 int VDataIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
840 AMDGPU::OpName::vdata); in convertMIMGInst()
842 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in convertMIMGInst()
843 int DMaskIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
844 AMDGPU::OpName::dmask); in convertMIMGInst()
846 int TFEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
847 AMDGPU::OpName::tfe); in convertMIMGInst()
848 int D16Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
849 AMDGPU::OpName::d16); in convertMIMGInst()
851 const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(MI.getOpcode()); in convertMIMGInst()
852 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in convertMIMGInst()
853 AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode); in convertMIMGInst()
858 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::a16) > -1) { in convertMIMGInst()
871 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::dim); in convertMIMGInst()
873 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::a16); in convertMIMGInst()
874 const AMDGPU::MIMGDimInfo *Dim = in convertMIMGInst()
875 AMDGPU::getMIMGDimInfoByEncoding(MI.getOperand(DimIdx).getImm()); in convertMIMGInst()
879 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, AMDGPU::hasG16(STI)); in convertMIMGInst()
881 IsNSA = Info->MIMGEncoding == AMDGPU::MIMGEncGfx10NSA || in convertMIMGInst()
882 Info->MIMGEncoding == AMDGPU::MIMGEncGfx11NSA; in convertMIMGInst()
899 if (D16 && AMDGPU::hasPackedD16(STI)) { in convertMIMGInst()
910 AMDGPU::getMIMGOpcode(Info->BaseOpcode, Info->MIMGEncoding, DstSize, AddrSize); in convertMIMGInst()
915 unsigned NewVdata = AMDGPU::NoRegister; in convertMIMGInst()
921 unsigned VdataSub0 = MRI.getSubReg(Vdata0, AMDGPU::sub0); in convertMIMGInst()
924 NewVdata = MRI.getMatchingSuperReg(Vdata0, AMDGPU::sub0, in convertMIMGInst()
926 if (NewVdata == AMDGPU::NoRegister) { in convertMIMGInst()
934 unsigned NewVAddr0 = AMDGPU::NoRegister; in convertMIMGInst()
937 unsigned VAddrSub0 = MRI.getSubReg(VAddr0, AMDGPU::sub0); in convertMIMGInst()
941 NewVAddr0 = MRI.getMatchingSuperReg(VAddr0, AMDGPU::sub0, in convertMIMGInst()
943 if (NewVAddr0 == AMDGPU::NoRegister) in convertMIMGInst()
949 if (NewVdata != AMDGPU::NoRegister) { in convertMIMGInst()
958 if (NewVAddr0 != AMDGPU::NoRegister) { in convertMIMGInst()
978 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst_in) != -1) in convertVOP3PDPPInst()
979 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vdst_in); in convertVOP3PDPPInst()
982 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel) != -1) in convertVOP3PDPPInst()
984 AMDGPU::OpName::op_sel); in convertVOP3PDPPInst()
986 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::op_sel_hi) != -1) in convertVOP3PDPPInst()
988 AMDGPU::OpName::op_sel_hi); in convertVOP3PDPPInst()
990 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::neg_lo) != -1) in convertVOP3PDPPInst()
992 AMDGPU::OpName::neg_lo); in convertVOP3PDPPInst()
994 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::neg_hi) != -1) in convertVOP3PDPPInst()
996 AMDGPU::OpName::neg_hi); in convertVOP3PDPPInst()
1007 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::old) != -1) in convertVOPCDPPInst()
1008 insertNamedMCOperand(MI, MCOperand::createReg(0), AMDGPU::OpName::old); in convertVOPCDPPInst()
1011 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0_modifiers) != -1) in convertVOPCDPPInst()
1013 AMDGPU::OpName::src0_modifiers); in convertVOPCDPPInst()
1016 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1_modifiers) != -1) in convertVOPCDPPInst()
1018 AMDGPU::OpName::src1_modifiers); in convertVOPCDPPInst()
1028 AMDGPU::OpName::immDeferred); in convertFMAanyK()
1033 bool IsDeferredOp = (OpType == AMDGPU::OPERAND_REG_IMM_FP32_DEFERRED || in convertFMAanyK()
1034 OpType == AMDGPU::OPERAND_REG_IMM_FP16_DEFERRED); in convertFMAanyK()
1035 if (Op.isImm() && Op.getImm() == AMDGPU::EncValues::LITERAL_CONST && in convertFMAanyK()
1059 return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI)); in createRegOperand()
1079 case AMDGPU::SGPR_32RegClassID: in createSRegOperand()
1080 case AMDGPU::TTMP_32RegClassID: in createSRegOperand()
1082 case AMDGPU::SGPR_64RegClassID: in createSRegOperand()
1083 case AMDGPU::TTMP_64RegClassID: in createSRegOperand()
1086 case AMDGPU::SGPR_128RegClassID: in createSRegOperand()
1087 case AMDGPU::TTMP_128RegClassID: in createSRegOperand()
1090 case AMDGPU::SGPR_256RegClassID: in createSRegOperand()
1091 case AMDGPU::TTMP_256RegClassID: in createSRegOperand()
1094 case AMDGPU::SGPR_512RegClassID: in createSRegOperand()
1095 case AMDGPU::TTMP_512RegClassID: in createSRegOperand()
1142 return createRegOperand(AMDGPU::VGPR_32RegClassID, Val); in decodeOperand_VGPR_32()
1150 return createRegOperand(AMDGPU::AGPR_32RegClassID, Val & 255); in decodeOperand_AGPR_32()
1154 return createRegOperand(AMDGPU::AReg_64RegClassID, Val & 255); in decodeOperand_AReg_64()
1158 return createRegOperand(AMDGPU::AReg_128RegClassID, Val & 255); in decodeOperand_AReg_128()
1162 return createRegOperand(AMDGPU::AReg_256RegClassID, Val & 255); in decodeOperand_AReg_256()
1166 return createRegOperand(AMDGPU::AReg_512RegClassID, Val & 255); in decodeOperand_AReg_512()
1170 return createRegOperand(AMDGPU::AReg_1024RegClassID, Val & 255); in decodeOperand_AReg_1024()
1186 using namespace AMDGPU::EncValues; in decodeOperand_AVDst_128()
1192 using namespace AMDGPU::EncValues; in decodeOperand_AVDst_512()
1198 return createRegOperand(AMDGPU::VReg_64RegClassID, Val); in decodeOperand_VReg_64()
1202 return createRegOperand(AMDGPU::VReg_96RegClassID, Val); in decodeOperand_VReg_96()
1206 return createRegOperand(AMDGPU::VReg_128RegClassID, Val); in decodeOperand_VReg_128()
1210 return createRegOperand(AMDGPU::VReg_256RegClassID, Val); in decodeOperand_VReg_256()
1214 return createRegOperand(AMDGPU::VReg_512RegClassID, Val); in decodeOperand_VReg_512()
1218 return createRegOperand(AMDGPU::VReg_1024RegClassID, Val); in decodeOperand_VReg_1024()
1272 AMDGPU::hasVOPD(STI) && in decodeMandatoryLiteralConstant()
1298 using namespace AMDGPU::EncValues; in decodeIntImmed()
1383 assert(Imm >= AMDGPU::EncValues::INLINE_FLOATING_C_MIN in decodeFPImmed()
1384 && Imm <= AMDGPU::EncValues::INLINE_FLOATING_C_MAX); in decodeFPImmed()
1406 using namespace AMDGPU; in getVgprClassId()
1427 using namespace AMDGPU; in getAgprClassId()
1449 using namespace AMDGPU; in getSgprClassId()
1469 using namespace AMDGPU; in getTtmpClassId()
1487 using namespace AMDGPU::EncValues; in getTTmpIdx()
1497 using namespace AMDGPU::EncValues; in decodeSrcOp()
1547 using namespace AMDGPU::EncValues; in decodeDstOp()
1571 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::vdstX); in decodeVOPDDstYOp()
1581 using namespace AMDGPU; in decodeSpecialReg32()
1615 using namespace AMDGPU; in decodeSpecialReg64()
1647 using namespace AMDGPU::SDWA; in decodeSDWASrc()
1648 using namespace AMDGPU::EncValues; in decodeSDWASrc()
1650 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in decodeSDWASrc()
1651 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in decodeSDWASrc()
1680 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in decodeSDWASrc()
1695 using namespace AMDGPU::SDWA; in decodeSDWAVopcDst()
1697 assert((STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in decodeSDWAVopcDst()
1698 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) && in decodeSDWAVopcDst()
1701 bool IsWave64 = STI.getFeatureBits()[AMDGPU::FeatureWavefrontSize64]; in decodeSDWAVopcDst()
1717 return createRegOperand(IsWave64 ? AMDGPU::VCC : AMDGPU::VCC_LO); in decodeSDWAVopcDst()
1722 return STI.getFeatureBits()[AMDGPU::FeatureWavefrontSize64] ? in decodeBoolReg()
1727 return STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]; in isVI()
1730 bool AMDGPUDisassembler::isGFX9() const { return AMDGPU::isGFX9(STI); } in isGFX9()
1733 return STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]; in isGFX90A()
1736 bool AMDGPUDisassembler::isGFX9Plus() const { return AMDGPU::isGFX9Plus(STI); } in isGFX9Plus()
1738 bool AMDGPUDisassembler::isGFX10() const { return AMDGPU::isGFX10(STI); } in isGFX10()
1741 return AMDGPU::isGFX10Plus(STI); in isGFX10Plus()
1745 return STI.getFeatureBits()[AMDGPU::FeatureGFX11]; in isGFX11()
1749 return AMDGPU::isGFX11Plus(STI); in isGFX11Plus()
1754 return STI.getFeatureBits()[AMDGPU::FeatureArchitectedFlatScratch]; in hasArchitectedFlatScratch()
1782 AMDGPU::IsaInfo::getVGPREncodingGranule(&STI); in decodeCOMPUTE_PGM_RSRC1()
1813 AMDGPU::IsaInfo::getSGPREncodingGranule(&STI); in decodeCOMPUTE_PGM_RSRC1()