Lines Matching refs:isRegOrImmWithInputMods
259 bool isRegOrImmWithInputMods(unsigned RCID, MVT type) const { in isRegOrImmWithInputMods() function in __anon71e405cc0111::AMDGPUOperand
264 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i16); in isRegOrImmWithInt16InputMods()
268 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::i32); in isRegOrImmWithInt32InputMods()
280 return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::i64); in isRegOrImmWithInt64InputMods()
284 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f16); in isRegOrImmWithFP16InputMods()
288 return isRegOrImmWithInputMods(AMDGPU::VS_32RegClassID, MVT::f32); in isRegOrImmWithFP32InputMods()
292 return isRegOrImmWithInputMods(AMDGPU::VS_64RegClassID, MVT::f64); in isRegOrImmWithFP64InputMods()
8068 static bool isRegOrImmWithInputMods(const MCInstrDesc &Desc, unsigned OpNum) { in isRegOrImmWithInputMods() function
8092 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVOP3Interp()
8131 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVINTERP()
8192 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVOP3()
8797 isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtVOP3DPP()
8874 isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtDPP()
8885 isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtDPP()
9038 if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { in cvtSDWA()