4796     return TokError("invalid major version");  in ParseDirectiveMajorMinor()
4799     return TokError("minor version number required, comma expected");  in ParseDirectiveMajorMinor()
4802     return TokError("invalid minor version");  in ParseDirectiveMajorMinor()
4809     return TokError("directive only supported for amdgcn architecture");  in ParseDirectiveAMDGCNTarget()
4873     return TokError("directive only supported for amdgcn architecture");  in ParseDirectiveAMDHSAKernel()
4876     return TokError("directive only supported for amdhsa OS");  in ParseDirectiveAMDHSAKernel()
4917       return TokError(".amdhsa_ directives cannot be repeated");  in ParseDirectiveAMDHSAKernel()
5166     return TokError(".amdhsa_next_free_vgpr directive is required");  in ParseDirectiveAMDHSAKernel()
5169     return TokError(".amdhsa_next_free_sgpr directive is required");  in ParseDirectiveAMDHSAKernel()
5194     return TokError("amdgpu_user_sgpr_count smaller than than implied by "  in ParseDirectiveAMDHSAKernel()
5201     return TokError("too many user SGPRs enabled");  in ParseDirectiveAMDHSAKernel()
5207       return TokError(".amdhsa_accum_offset directive is required");  in ParseDirectiveAMDHSAKernel()
5209       return TokError("accum_offset should be in range [4..256] in "  in ParseDirectiveAMDHSAKernel()
5212       return TokError("accum_offset exceeds total VGPR allocation");  in ParseDirectiveAMDHSAKernel()
5220       return TokError("shared_vgpr_count directive not valid on "  in ParseDirectiveAMDHSAKernel()
5224       return TokError("shared_vgpr_count*2 + "  in ParseDirectiveAMDHSAKernel()
5268     return TokError("stepping version number required, comma expected");  in ParseDirectiveHSACodeObjectISA()
5271     return TokError("invalid stepping version");  in ParseDirectiveHSACodeObjectISA()
5274     return TokError("vendor name required, comma expected");  in ParseDirectiveHSACodeObjectISA()
5280     return TokError("arch name required, comma expected");  in ParseDirectiveHSACodeObjectISA()
5302     return TokError(Err.str());  in ParseAMDKernelCodeTValue()
5309         return TokError("enable_wavefront_size32=1 is only allowed on GFX10+");  in ParseAMDKernelCodeTValue()
5311         return TokError("enable_wavefront_size32=1 requires +WavefrontSize32");  in ParseAMDKernelCodeTValue()
5314         return TokError("enable_wavefront_size32=0 requires +WavefrontSize64");  in ParseAMDKernelCodeTValue()
5321         return TokError("wavefront_size=5 is only allowed on GFX10+");  in ParseAMDKernelCodeTValue()
5323         return TokError("wavefront_size=5 requires +WavefrontSize32");  in ParseAMDKernelCodeTValue()
5326         return TokError("wavefront_size=6 requires +WavefrontSize64");  in ParseAMDKernelCodeTValue()
5333       return TokError("enable_wgp_mode=1 is only allowed on GFX10+");  in ParseAMDKernelCodeTValue()
5339       return TokError("enable_mem_ordered=1 is only allowed on GFX10+");  in ParseAMDKernelCodeTValue()
5345       return TokError("enable_fwd_progress=1 is only allowed on GFX10+");  in ParseAMDKernelCodeTValue()
5468     return TokError(Twine("expected directive ") +  in ParseToEndDirective()
5502       return TokError(Twine("invalid value in ") +  in ParseDirectivePALMetadata()
5506       return TokError(Twine("expected an even number of values in ") +  in ParseDirectivePALMetadata()
5510       return TokError(Twine("invalid value in ") +  in ParseDirectivePALMetadata()
5529     return TokError("expected identifier in directive");  in ParseDirectiveAMDGPULDS()