Lines Matching refs:AMDGPUAsmParser
48 class AMDGPUAsmParser;
65 const AMDGPUAsmParser *AsmParser;
68 AMDGPUOperand(KindTy Kind_, const AMDGPUAsmParser *AsmParser_) in AMDGPUOperand()
1093 static AMDGPUOperand::Ptr CreateImm(const AMDGPUAsmParser *AsmParser, in CreateImm()
1108 static AMDGPUOperand::Ptr CreateToken(const AMDGPUAsmParser *AsmParser, in CreateToken()
1119 static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser, in CreateReg()
1130 static AMDGPUOperand::Ptr CreateExpr(const AMDGPUAsmParser *AsmParser, in CreateExpr()
1237 class AMDGPUAsmParser : public MCTargetAsmParser { class
1349 AMDGPUAsmParser(const MCSubtargetInfo &STI, MCAsmParser &_Parser, in AMDGPUAsmParser() function in __anon71e405cc0111::AMDGPUAsmParser
1485 return const_cast<AMDGPUAsmParser*>(this)->getContext().getRegisterInfo(); in getMRI()
2123 const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(Inst.getLoc(), in addLiteralImmOperand()
2452 bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, in ParseRegister()
2463 bool AMDGPUAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, in ParseRegister()
2468 OperandMatchResultTy AMDGPUAsmParser::tryParseRegister(unsigned &RegNo, in tryParseRegister()
2482 bool AMDGPUAsmParser::AddNextRegisterToList(unsigned &Reg, unsigned &RegWidth, in AddNextRegisterToList()
2566 AMDGPUAsmParser::isRegister(const AsmToken &Token, in isRegister()
2599 AMDGPUAsmParser::isRegister() in isRegister()
2605 AMDGPUAsmParser::getRegularReg(RegisterKind RegKind, in getRegularReg()
2641 bool AMDGPUAsmParser::ParseRegRange(unsigned &Num, unsigned &RegWidth) { in ParseRegRange()
2683 unsigned AMDGPUAsmParser::ParseSpecialReg(RegisterKind &RegKind, in ParseSpecialReg()
2698 unsigned AMDGPUAsmParser::ParseRegularReg(RegisterKind &RegKind, in ParseRegularReg()
2732 unsigned AMDGPUAsmParser::ParseRegList(RegisterKind &RegKind, unsigned &RegNum, in ParseRegList()
2786 bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg, in ParseAMDGPURegister()
2818 bool AMDGPUAsmParser::ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg, in ParseAMDGPURegister()
2836 AMDGPUAsmParser::getGprCountSymbolName(RegisterKind RegKind) { in getGprCountSymbolName()
2847 void AMDGPUAsmParser::initializeGprCountSymbol(RegisterKind RegKind) { in initializeGprCountSymbol()
2854 bool AMDGPUAsmParser::updateGprCountSymbols(RegisterKind RegKind, in updateGprCountSymbols()
2884 AMDGPUAsmParser::parseRegister(bool RestoreOnFailure) { in parseRegister()
2903 AMDGPUAsmParser::parseImm(OperandVector &Operands, bool HasSP3AbsModifier) { in parseImm()
2978 AMDGPUAsmParser::parseReg(OperandVector &Operands) { in parseReg()
2991 AMDGPUAsmParser::parseRegOrImm(OperandVector &Operands, bool HasSP3AbsMod) { in parseRegOrImm()
3003 AMDGPUAsmParser::isNamedOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const { in isNamedOperandModifier()
3012 AMDGPUAsmParser::isOpcodeModifierWithVal(const AsmToken &Token, const AsmToken &NextToken) const { in isOpcodeModifierWithVal()
3017 AMDGPUAsmParser::isOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const { in isOperandModifier()
3022 AMDGPUAsmParser::isRegOrOperandModifier(const AsmToken &Token, const AsmToken &NextToken) const { in isRegOrOperandModifier()
3042 AMDGPUAsmParser::isModifier() { in isModifier()
3076 AMDGPUAsmParser::parseSP3NegModifier() { in parseSP3NegModifier()
3093 AMDGPUAsmParser::parseRegOrImmWithFPInputMods(OperandVector &Operands, in parseRegOrImmWithFPInputMods()
3160 AMDGPUAsmParser::parseRegOrImmWithIntInputMods(OperandVector &Operands, in parseRegOrImmWithIntInputMods()
3195 AMDGPUAsmParser::parseRegWithFPInputMods(OperandVector &Operands) { in parseRegWithFPInputMods()
3200 AMDGPUAsmParser::parseRegWithIntInputMods(OperandVector &Operands) { in parseRegWithIntInputMods()
3204 OperandMatchResultTy AMDGPUAsmParser::parseVReg32OrOff(OperandVector &Operands) { in parseVReg32OrOff()
3225 unsigned AMDGPUAsmParser::checkTargetMatchPredicate(MCInst &Inst) { in checkTargetMatchPredicate()
3264 ArrayRef<unsigned> AMDGPUAsmParser::getMatchedVariants() const { in getMatchedVariants()
3293 StringRef AMDGPUAsmParser::getMatchedVariantName() const { in getMatchedVariantName()
3312 unsigned AMDGPUAsmParser::findImplicitSGPRReadInVOP(const MCInst &Inst) const { in findImplicitSGPRReadInVOP()
3335 bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst, in isInlineConstant()
3377 unsigned AMDGPUAsmParser::getConstantBusLimit(unsigned Opcode) const { in getConstantBusLimit()
3401 bool AMDGPUAsmParser::usesConstantBus(const MCInst &Inst, unsigned OpIdx) { in usesConstantBus()
3416 AMDGPUAsmParser::validateConstantBusLimitations(const MCInst &Inst, in validateConstantBusLimitations()
3505 AMDGPUAsmParser::validateEarlyClobberLimitations(const MCInst &Inst, in validateEarlyClobberLimitations()
3544 bool AMDGPUAsmParser::validateIntClampSupported(const MCInst &Inst) { in validateIntClampSupported()
3558 Optional<StringRef> AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst) { in validateMIMGDataSize()
3599 bool AMDGPUAsmParser::validateMIMGAddrSize(const MCInst &Inst) { in validateMIMGAddrSize()
3647 bool AMDGPUAsmParser::validateMIMGAtomicDMask(const MCInst &Inst) { in validateMIMGAtomicDMask()
3667 bool AMDGPUAsmParser::validateMIMGGatherDMask(const MCInst &Inst) { in validateMIMGGatherDMask()
3686 bool AMDGPUAsmParser::validateMIMGMSAA(const MCInst &Inst) { in validateMIMGMSAA()
3724 bool AMDGPUAsmParser::validateMovrels(const MCInst &Inst, in validateMovrels()
3752 bool AMDGPUAsmParser::validateMAIAccWrite(const MCInst &Inst, in validateMAIAccWrite()
3778 bool AMDGPUAsmParser::validateMFMA(const MCInst &Inst, in validateMFMA()
3812 bool AMDGPUAsmParser::validateDivScale(const MCInst &Inst) { in validateDivScale()
3840 bool AMDGPUAsmParser::validateMIMGD16(const MCInst &Inst) { in validateMIMGD16()
3857 bool AMDGPUAsmParser::validateMIMGDim(const MCInst &Inst) { in validateMIMGDim()
4004 Optional<StringRef> AMDGPUAsmParser::validateLdsDirect(const MCInst &Inst) { in validateLdsDirect()
4037 SMLoc AMDGPUAsmParser::getFlatOffsetLoc(const OperandVector &Operands) const { in getFlatOffsetLoc()
4046 bool AMDGPUAsmParser::validateFlatOffset(const MCInst &Inst, in validateFlatOffset()
4084 SMLoc AMDGPUAsmParser::getSMEMOffsetLoc(const OperandVector &Operands) const { in getSMEMOffsetLoc()
4094 bool AMDGPUAsmParser::validateSMEMOffset(const MCInst &Inst, in validateSMEMOffset()
4125 bool AMDGPUAsmParser::validateSOPLiteral(const MCInst &Inst) const { in validateSOPLiteral()
4161 bool AMDGPUAsmParser::validateOpSel(const MCInst &Inst) { in validateOpSel()
4199 bool AMDGPUAsmParser::validateDPP(const MCInst &Inst, in validateDPP()
4222 bool AMDGPUAsmParser::validateVccOperand(unsigned Reg) const { in validateVccOperand()
4229 bool AMDGPUAsmParser::validateVOPLiteral(const MCInst &Inst, in validateVOPLiteral()
4310 bool AMDGPUAsmParser::validateAGPRLdSt(const MCInst &Inst) const { in validateAGPRLdSt()
4340 bool AMDGPUAsmParser::validateVGPRAlign(const MCInst &Inst) const { in validateVGPRAlign()
4366 SMLoc AMDGPUAsmParser::getBLGPLoc(const OperandVector &Operands) const { in getBLGPLoc()
4375 bool AMDGPUAsmParser::validateBLGP(const MCInst &Inst, in validateBLGP()
4409 bool AMDGPUAsmParser::validateGWS(const MCInst &Inst, in validateGWS()
4435 bool AMDGPUAsmParser::validateCoherencyBits(const MCInst &Inst, in validateCoherencyBits()
4490 bool AMDGPUAsmParser::validateFlatLdsDMA(const MCInst &Inst, in validateFlatLdsDMA()
4515 bool AMDGPUAsmParser::validateExeczVcczOperands(const OperandVector &Operands) { in validateExeczVcczOperands()
4531 bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst, in validateInstruction()
4661 bool AMDGPUAsmParser::isSupportedMnemo(StringRef Mnemo, in isSupportedMnemo()
4666 bool AMDGPUAsmParser::isSupportedMnemo(StringRef Mnemo, in isSupportedMnemo()
4677 bool AMDGPUAsmParser::checkUnsupportedInstruction(StringRef Mnemo, in checkUnsupportedInstruction()
4708 bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, in MatchAndEmitInstruction()
4781 bool AMDGPUAsmParser::ParseAsAbsoluteExpression(uint32_t &Ret) { in ParseAsAbsoluteExpression()
4793 bool AMDGPUAsmParser::ParseDirectiveMajorMinor(uint32_t &Major, in ParseDirectiveMajorMinor()
4807 bool AMDGPUAsmParser::ParseDirectiveAMDGCNTarget() { in ParseDirectiveAMDGCNTarget()
4827 bool AMDGPUAsmParser::OutOfRangeError(SMRange Range) { in OutOfRangeError()
4831 bool AMDGPUAsmParser::calculateGPRBlocks( in calculateGPRBlocks()
4871 bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() { in ParseDirectiveAMDHSAKernel()
5236 bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectVersion() { in ParseDirectiveHSACodeObjectVersion()
5247 bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectISA() { in ParseDirectiveHSACodeObjectISA()
5290 bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID, in ParseAMDKernelCodeTValue()
5351 bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() { in ParseDirectiveAMDKernelCodeT()
5376 bool AMDGPUAsmParser::ParseDirectiveAMDGPUHsaKernel() { in ParseDirectiveAMDGPUHsaKernel()
5388 bool AMDGPUAsmParser::ParseDirectiveISAVersion() { in ParseDirectiveISAVersion()
5405 bool AMDGPUAsmParser::ParseDirectiveHSAMetadata() { in ParseDirectiveHSAMetadata()
5439 bool AMDGPUAsmParser::ParseToEndDirective(const char *AssemblerDirectiveBegin, in ParseToEndDirective()
5477 bool AMDGPUAsmParser::ParseDirectivePALMetadataBegin() { in ParseDirectivePALMetadataBegin()
5490 bool AMDGPUAsmParser::ParseDirectivePALMetadata() { in ParseDirectivePALMetadata()
5522 bool AMDGPUAsmParser::ParseDirectiveAMDGPULDS() { in ParseDirectiveAMDGPULDS()
5572 bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) { in ParseDirective()
5617 bool AMDGPUAsmParser::subtargetHasRegister(const MCRegisterInfo &MRI, in subtargetHasRegister()
5678 AMDGPUAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic, in parseOperand()
5733 StringRef AMDGPUAsmParser::parseMnemonicSuffix(StringRef Name) { in parseMnemonicSuffix()
5763 bool AMDGPUAsmParser::ParseInstruction(ParseInstructionInfo &Info, in ParseInstruction()
5811 AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix, int64_t &IntVal) { in parseIntWithPrefix()
5820 AMDGPUAsmParser::parseIntWithPrefix(const char *Prefix, OperandVector &Operands, in parseIntWithPrefix()
5839 AMDGPUAsmParser::parseOperandArrayWithPrefix(const char *Prefix, in parseOperandArrayWithPrefix()
5885 AMDGPUAsmParser::parseNamedBit(StringRef Name, OperandVector &Operands, in parseNamedBit()
5915 AMDGPUAsmParser::parseCPol(OperandVector &Operands) { in parseCPol()
5989 AMDGPUAsmParser::OptionalImmIndexMap& OptionalIdx, in addOptionalImmOperand()
6002 AMDGPUAsmParser::parseStringWithPrefix(StringRef Prefix, in parseStringWithPrefix()
6017 bool AMDGPUAsmParser::tryParseFmt(const char *Pref, in tryParseFmt()
6041 AMDGPUAsmParser::parseDfmtNfmt(int64_t &Format) { in parseDfmtNfmt()
6074 AMDGPUAsmParser::parseUfmt(int64_t &Format) { in parseUfmt()
6089 bool AMDGPUAsmParser::matchDfmtNfmt(int64_t &Dfmt, in matchDfmtNfmt()
6113 AMDGPUAsmParser::parseSymbolicSplitFormat(StringRef FormatStr, in parseSymbolicSplitFormat()
6157 AMDGPUAsmParser::parseSymbolicUnifiedFormat(StringRef FormatStr, in parseSymbolicUnifiedFormat()
6176 AMDGPUAsmParser::parseNumericFormat(int64_t &Format) { in parseNumericFormat()
6191 AMDGPUAsmParser::parseSymbolicOrNumericFormat(int64_t &Format) { in parseSymbolicOrNumericFormat()
6219 AMDGPUAsmParser::parseFORMAT(OperandVector &Operands) { in parseFORMAT()
6276 void AMDGPUAsmParser::cvtDSOffset01(MCInst &Inst, in cvtDSOffset01()
6300 void AMDGPUAsmParser::cvtDSImpl(MCInst &Inst, const OperandVector &Operands, in cvtDSImpl()
6334 void AMDGPUAsmParser::cvtExp(MCInst &Inst, const OperandVector &Operands) { in cvtExp()
6421 bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) { in parseCnt()
6470 AMDGPUAsmParser::parseSWaitCntOps(OperandVector &Operands) { in parseSWaitCntOps()
6489 bool AMDGPUAsmParser::parseDelay(int64_t &Delay) { in parseDelay()
6552 AMDGPUAsmParser::parseSDelayAluOps(OperandVector &Operands) { in parseSDelayAluOps()
6581 void AMDGPUAsmParser::depCtrError(SMLoc Loc, int ErrorId, in depCtrError()
6601 bool AMDGPUAsmParser::parseDepCtr(int64_t &DepCtr, unsigned &UsedOprMask) { in parseDepCtr()
6639 OperandMatchResultTy AMDGPUAsmParser::parseDepCtrOps(OperandVector &Operands) { in parseDepCtrOps()
6667 AMDGPUAsmParser::parseHwregBody(OperandInfoTy &HwReg, in parseHwregBody()
6702 AMDGPUAsmParser::validateHwreg(const OperandInfoTy &HwReg, in validateHwreg()
6734 AMDGPUAsmParser::parseHwreg(OperandVector &Operands) { in parseHwreg()
6772 AMDGPUAsmParser::parseSendMsgBody(OperandInfoTy &Msg, in parseSendMsgBody()
6808 AMDGPUAsmParser::validateSendMsg(const OperandInfoTy &Msg, in validateSendMsg()
6854 AMDGPUAsmParser::parseSendMsgOp(OperandVector &Operands) { in parseSendMsgOp()
6891 OperandMatchResultTy AMDGPUAsmParser::parseInterpSlot(OperandVector &Operands) { in parseInterpSlot()
6914 OperandMatchResultTy AMDGPUAsmParser::parseInterpAttr(OperandVector &Operands) { in parseInterpAttr()
6964 OperandMatchResultTy AMDGPUAsmParser::parseExpTgt(OperandVector &Operands) { in parseExpTgt()
6991 AMDGPUAsmParser::isId(const AsmToken &Token, const StringRef Id) const { in isId()
6996 AMDGPUAsmParser::isId(const StringRef Id) const { in isId()
7001 AMDGPUAsmParser::isToken(const AsmToken::TokenKind Kind) const { in isToken()
7006 AMDGPUAsmParser::trySkipId(const StringRef Id) { in trySkipId()
7015 AMDGPUAsmParser::trySkipId(const StringRef Pref, const StringRef Id) { in trySkipId()
7027 AMDGPUAsmParser::trySkipId(const StringRef Id, const AsmToken::TokenKind Kind) { in trySkipId()
7037 AMDGPUAsmParser::trySkipToken(const AsmToken::TokenKind Kind) { in trySkipToken()
7046 AMDGPUAsmParser::skipToken(const AsmToken::TokenKind Kind, in skipToken()
7056 AMDGPUAsmParser::parseExpr(int64_t &Imm, StringRef Expected) { in parseExpr()
7076 AMDGPUAsmParser::parseExpr(OperandVector &Operands) { in parseExpr()
7093 AMDGPUAsmParser::parseString(StringRef &Val, const StringRef ErrMsg) { in parseString()
7105 AMDGPUAsmParser::parseId(StringRef &Val, const StringRef ErrMsg) { in parseId()
7118 AMDGPUAsmParser::getToken() const { in getToken()
7122 AsmToken AMDGPUAsmParser::peekToken(bool ShouldSkipSpace) { in peekToken()
7129 AMDGPUAsmParser::peekTokens(MutableArrayRef<AsmToken> Tokens) { in peekTokens()
7137 AMDGPUAsmParser::getTokenKind() const { in getTokenKind()
7142 AMDGPUAsmParser::getLoc() const { in getLoc()
7147 AMDGPUAsmParser::getTokenStr() const { in getTokenStr()
7152 AMDGPUAsmParser::lex() { in lex()
7157 AMDGPUAsmParser::getOperandLoc(std::function<bool(const AMDGPUOperand&)> Test, in getOperandLoc()
7168 AMDGPUAsmParser::getImmLoc(AMDGPUOperand::ImmTy Type, in getImmLoc()
7175 AMDGPUAsmParser::getRegLoc(unsigned Reg, in getRegLoc()
7184 AMDGPUAsmParser::getLitLoc(const OperandVector &Operands) const { in getLitLoc()
7192 AMDGPUAsmParser::getConstLoc(const OperandVector &Operands) const { in getConstLoc()
7217 AMDGPUAsmParser::parseSwizzleOperand(int64_t &Op, in parseSwizzleOperand()
7238 AMDGPUAsmParser::parseSwizzleOperands(const unsigned OpNum, int64_t* Op, in parseSwizzleOperands()
7252 AMDGPUAsmParser::parseSwizzleQuadPerm(int64_t &Imm) { in parseSwizzleQuadPerm()
7268 AMDGPUAsmParser::parseSwizzleBroadcast(int64_t &Imm) { in parseSwizzleBroadcast()
7296 AMDGPUAsmParser::parseSwizzleReverse(int64_t &Imm) { in parseSwizzleReverse()
7318 AMDGPUAsmParser::parseSwizzleSwap(int64_t &Imm) { in parseSwizzleSwap()
7340 AMDGPUAsmParser::parseSwizzleBitmaskPerm(int64_t &Imm) { in parseSwizzleBitmaskPerm()
7387 AMDGPUAsmParser::parseSwizzleOffset(int64_t &Imm) { in parseSwizzleOffset()
7402 AMDGPUAsmParser::parseSwizzleMacro(int64_t &Imm) { in parseSwizzleMacro()
7431 AMDGPUAsmParser::parseSwizzleOp(OperandVector &Operands) { in parseSwizzleOp()
7465 int64_t AMDGPUAsmParser::parseGPRIdxMacro() { in parseGPRIdxMacro()
7510 AMDGPUAsmParser::parseGPRIdxMode(OperandVector &Operands) { in parseGPRIdxMode()
7544 AMDGPUAsmParser::parseSOppBrTarget(OperandVector &Operands) { in parseSOppBrTarget()
7575 AMDGPUAsmParser::parseBoolReg(OperandVector &Operands) { in parseBoolReg()
7583 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultCPol() const { in defaultCPol()
7587 void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst, in cvtMubufImpl()
7654 void AMDGPUAsmParser::cvtMtbuf(MCInst &Inst, const OperandVector &Operands) { in cvtMtbuf()
7695 void AMDGPUAsmParser::cvtMIMG(MCInst &Inst, const OperandVector &Operands, in cvtMIMG()
7742 void AMDGPUAsmParser::cvtMIMGAtomic(MCInst &Inst, const OperandVector &Operands) { in cvtMIMGAtomic()
7746 void AMDGPUAsmParser::cvtSMEMAtomic(MCInst &Inst, const OperandVector &Operands) { in cvtSMEMAtomic()
7801 void AMDGPUAsmParser::cvtIntersectRay(MCInst &Inst, in cvtIntersectRay()
7831 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMRDOffset8() const { in defaultSMRDOffset8()
7835 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMEMOffset() const { in defaultSMEMOffset()
7839 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultSMRDLiteralOffset() const { in defaultSMRDLiteralOffset()
7843 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultFlatOffset() const { in defaultFlatOffset()
7933 void AMDGPUAsmParser::onBeginOfFile() { in onBeginOfFile()
7945 OperandMatchResultTy AMDGPUAsmParser::parseOptionalOperand(OperandVector &Operands) { in parseOptionalOperand()
7972 OperandMatchResultTy AMDGPUAsmParser::parseOptionalOpr(OperandVector &Operands) { in parseOptionalOpr()
8015 OperandMatchResultTy AMDGPUAsmParser::parseOModOperand(OperandVector &Operands) { in parseOModOperand()
8056 void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst, in cvtVOP3OpSel()
8062 void AMDGPUAsmParser::cvtVOP3OpSel(MCInst &Inst, const OperandVector &Operands, in cvtVOP3OpSel()
8079 void AMDGPUAsmParser::cvtVOP3Interp(MCInst &Inst, const OperandVector &Operands) in cvtVOP3Interp()
8118 void AMDGPUAsmParser::cvtVINTERP(MCInst &Inst, const OperandVector &Operands) in cvtVINTERP()
8178 void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands, in cvtVOP3()
8249 void AMDGPUAsmParser::cvtVOP3(MCInst &Inst, const OperandVector &Operands) { in cvtVOP3()
8254 void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands, in cvtVOP3P()
8345 void AMDGPUAsmParser::cvtVOP3P(MCInst &Inst, const OperandVector &Operands) { in cvtVOP3P()
8355 OperandMatchResultTy AMDGPUAsmParser::parseVOPD(OperandVector &Operands) { in parseVOPD()
8384 void AMDGPUAsmParser::cvtVOPD(MCInst &Inst, const OperandVector &Operands) { in cvtVOPD()
8523 bool AMDGPUAsmParser::parseDimId(unsigned &Encoding) { in parseDimId()
8552 OperandMatchResultTy AMDGPUAsmParser::parseDim(OperandVector &Operands) { in parseDim()
8577 OperandMatchResultTy AMDGPUAsmParser::parseDPP8(OperandVector &Operands) { in parseDPP8()
8615 AMDGPUAsmParser::isSupportedDPPCtrl(StringRef Ctrl, in isSupportedDPPCtrl()
8640 AMDGPUAsmParser::parseDPPCtrlPerm() { in parseDPPCtrlPerm()
8670 AMDGPUAsmParser::parseDPPCtrlSel(StringRef Ctrl) { in parseDPPCtrlSel()
8718 AMDGPUAsmParser::parseDPPCtrl(OperandVector &Operands) { in parseDPPCtrl()
8753 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultRowMask() const { in defaultRowMask()
8757 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultEndpgmImmOperands() const { in defaultEndpgmImmOperands()
8761 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultBankMask() const { in defaultBankMask()
8765 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultBoundCtrl() const { in defaultBoundCtrl()
8769 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultFI() const { in defaultFI()
8773 void AMDGPUAsmParser::cvtVOP3DPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8) { in cvtVOP3DPP()
8841 void AMDGPUAsmParser::cvtDPP(MCInst &Inst, const OperandVector &Operands, bool IsDPP8) { in cvtDPP()
8918 AMDGPUAsmParser::parseSDWASel(OperandVector &Operands, StringRef Prefix, in parseSDWASel()
8953 AMDGPUAsmParser::parseSDWADstUnused(OperandVector &Operands) { in parseSDWADstUnused()
8982 void AMDGPUAsmParser::cvtSdwaVOP1(MCInst &Inst, const OperandVector &Operands) { in cvtSdwaVOP1()
8986 void AMDGPUAsmParser::cvtSdwaVOP2(MCInst &Inst, const OperandVector &Operands) { in cvtSdwaVOP2()
8990 void AMDGPUAsmParser::cvtSdwaVOP2b(MCInst &Inst, const OperandVector &Operands) { in cvtSdwaVOP2b()
8994 void AMDGPUAsmParser::cvtSdwaVOP2e(MCInst &Inst, const OperandVector &Operands) { in cvtSdwaVOP2e()
8998 void AMDGPUAsmParser::cvtSdwaVOPC(MCInst &Inst, const OperandVector &Operands) { in cvtSdwaVOPC()
9002 void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands, in cvtSDWA()
9117 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultBLGP() const { in defaultBLGP()
9121 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultCBSZ() const { in defaultCBSZ()
9125 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultABID() const { in defaultABID()
9131 RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget()); in LLVMInitializeAMDGPUAsmParser()
9132 RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget()); in LLVMInitializeAMDGPUAsmParser()
9143 unsigned AMDGPUAsmParser::validateTargetOperandClass(MCParsedAsmOperand &Op, in validateTargetOperandClass()
9200 OperandMatchResultTy AMDGPUAsmParser::parseEndpgmOp(OperandVector &Operands) { in parseEndpgmOp()
9225 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultWaitVDST() const { in defaultWaitVDST()
9237 AMDGPUOperand::Ptr AMDGPUAsmParser::defaultWaitEXP() const { in defaultWaitEXP()