Lines Matching refs:addPass
645 PM.addPass(AMDGPUPropagateAttributesLatePass(*this)); in registerPassBuilderCallbacks()
649 PM.addPass(AMDGPUUnifyMetadataPass()); in registerPassBuilderCallbacks()
653 PM.addPass(AMDGPUPrintfRuntimeBindingPass()); in registerPassBuilderCallbacks()
657 PM.addPass(AMDGPUAlwaysInlinePass()); in registerPassBuilderCallbacks()
661 PM.addPass(AMDGPUReplaceLDSUseWithPointerPass()); in registerPassBuilderCallbacks()
665 PM.addPass(AMDGPULowerModuleLDSPass()); in registerPassBuilderCallbacks()
674 PM.addPass(AMDGPUSimplifyLibCallsPass(*this)); in registerPassBuilderCallbacks()
678 PM.addPass(AMDGPUUseNativeCallsPass()); in registerPassBuilderCallbacks()
682 PM.addPass(AMDGPUPromoteAllocaPass(*this)); in registerPassBuilderCallbacks()
686 PM.addPass(AMDGPUPromoteAllocaToVectorPass(*this)); in registerPassBuilderCallbacks()
690 PM.addPass(AMDGPULowerKernelAttributesPass()); in registerPassBuilderCallbacks()
694 PM.addPass(AMDGPUPropagateAttributesEarlyPass(*this)); in registerPassBuilderCallbacks()
698 PM.addPass(AMDGPUPromoteKernelArgumentsPass()); in registerPassBuilderCallbacks()
719 FPM.addPass(AMDGPUPropagateAttributesEarlyPass(*this)); in registerPassBuilderCallbacks()
720 FPM.addPass(AMDGPUUseNativeCallsPass()); in registerPassBuilderCallbacks()
722 FPM.addPass(AMDGPUSimplifyLibCallsPass(*this)); in registerPassBuilderCallbacks()
723 PM.addPass(createModuleToFunctionPassAdaptor(std::move(FPM))); in registerPassBuilderCallbacks()
731 PM.addPass(AMDGPUUnifyMetadataPass()); in registerPassBuilderCallbacks()
732 PM.addPass(AMDGPUPrintfRuntimeBindingPass()); in registerPassBuilderCallbacks()
735 PM.addPass(InternalizePass(mustPreserveGV)); in registerPassBuilderCallbacks()
737 PM.addPass(AMDGPUPropagateAttributesLatePass(*this)); in registerPassBuilderCallbacks()
739 PM.addPass(GlobalDCEPass()); in registerPassBuilderCallbacks()
742 PM.addPass(AMDGPUAlwaysInlinePass()); in registerPassBuilderCallbacks()
757 FPM.addPass(AMDGPUPromoteKernelArgumentsPass()); in registerPassBuilderCallbacks()
761 FPM.addPass(InferAddressSpacesPass()); in registerPassBuilderCallbacks()
765 FPM.addPass(AMDGPULowerKernelAttributesPass()); in registerPassBuilderCallbacks()
771 FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this)); in registerPassBuilderCallbacks()
774 PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM))); in registerPassBuilderCallbacks()
980 addPass(createGVNPass()); in addEarlyCSEOrGVNPass()
982 addPass(createEarlyCSEPass()); in addEarlyCSEOrGVNPass()
986 addPass(createLICMPass()); in addStraightLineScalarOptimizationPasses()
987 addPass(createSeparateConstOffsetFromGEPPass()); in addStraightLineScalarOptimizationPasses()
988 addPass(createSpeculativeExecutionPass()); in addStraightLineScalarOptimizationPasses()
991 addPass(createStraightLineStrengthReducePass()); in addStraightLineScalarOptimizationPasses()
996 addPass(createNaryReassociatePass()); in addStraightLineScalarOptimizationPasses()
999 addPass(createEarlyCSEPass()); in addStraightLineScalarOptimizationPasses()
1010 addPass(createAMDGPUPrintfRuntimeBinding()); in addIRPasses()
1011 addPass(createAMDGPUCtorDtorLoweringPass()); in addIRPasses()
1014 addPass(createAMDGPUPropagateAttributesEarlyPass(&TM)); in addIRPasses()
1016 addPass(createAMDGPULowerIntrinsicsPass()); in addIRPasses()
1019 addPass(createAMDGPUAlwaysInlinePass()); in addIRPasses()
1020 addPass(createAlwaysInlinerLegacyPass()); in addIRPasses()
1026 addPass(createBarrierNoopPass()); in addIRPasses()
1030 addPass(createR600OpenCLImageTypeLoweringPass()); in addIRPasses()
1033 addPass(createAMDGPUOpenCLEnqueuedBlockLoweringPass()); in addIRPasses()
1041 addPass(createAMDGPUReplaceLDSUseWithPointerPass()); in addIRPasses()
1043 addPass(createAMDGPULowerModuleLDSPass()); in addIRPasses()
1047 addPass(createInferAddressSpacesPass()); in addIRPasses()
1049 addPass(createAtomicExpandPass()); in addIRPasses()
1052 addPass(createAMDGPUPromoteAlloca()); in addIRPasses()
1055 addPass(createSROAPass()); in addIRPasses()
1060 addPass(createAMDGPUAAWrapperPass()); in addIRPasses()
1061 addPass(createExternalAAWrapperPass([](Pass &P, Function &, in addIRPasses()
1070 addPass(createAMDGPUCodeGenPreparePass()); in addIRPasses()
1094 addPass(createAMDGPUAttributorPass()); in addCodeGenPrepare()
1098 addPass(createAMDGPUAnnotateKernelFeaturesPass()); in addCodeGenPrepare()
1103 addPass(createAMDGPULowerKernelArgumentsPass()); in addCodeGenPrepare()
1108 addPass(createLoadStoreVectorizerPass()); in addCodeGenPrepare()
1114 addPass(createLowerSwitchPass()); in addCodeGenPrepare()
1119 addPass(createFlattenCFGPass()); in addPreISel()
1124 addPass(createAMDGPUISelDag(&getAMDGPUTargetMachine(), getOptLevel())); in addInstSelector()
1159 addPass(createAMDGPULateCodeGenPreparePass()); in addPreISel()
1162 addPass(createAMDGPUAtomicOptimizerPass()); in addPreISel()
1166 addPass(createSinkingPass()); in addPreISel()
1170 addPass(&AMDGPUUnifyDivergentExitNodesID); in addPreISel()
1173 addPass(createFixIrreduciblePass()); in addPreISel()
1174 addPass(createUnifyLoopExitsPass()); in addPreISel()
1176 addPass(createStructurizeCFGPass(false)); // true -> SkipUniformRegions in addPreISel()
1178 addPass(createAMDGPUAnnotateUniformValues()); in addPreISel()
1180 addPass(createSIAnnotateControlFlowPass()); in addPreISel()
1182 addPass(createLCSSAPass()); in addPreISel()
1185 addPass(&AMDGPUPerfHintAnalysisID); in addPreISel()
1200 addPass(&SIFoldOperandsID); in addMachineSSAOptimization()
1202 addPass(&GCNDPPCombineID); in addMachineSSAOptimization()
1203 addPass(&SILoadStoreOptimizerID); in addMachineSSAOptimization()
1205 addPass(&SIPeepholeSDWAID); in addMachineSSAOptimization()
1206 addPass(&EarlyMachineLICMID); in addMachineSSAOptimization()
1207 addPass(&MachineCSEID); in addMachineSSAOptimization()
1208 addPass(&SIFoldOperandsID); in addMachineSSAOptimization()
1210 addPass(&DeadMachineInstructionElimID); in addMachineSSAOptimization()
1211 addPass(createSIShrinkInstructionsPass()); in addMachineSSAOptimization()
1216 addPass(&EarlyIfConverterID); in addILPOpts()
1224 addPass(&SIFixSGPRCopiesID); in addInstSelector()
1225 addPass(createSILowerI1CopiesPass()); in addInstSelector()
1230 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
1236 addPass(createAMDGPUPreLegalizeCombiner(IsOptNone)); in addPreLegalizeMachineIR()
1237 addPass(new Localizer()); in addPreLegalizeMachineIR()
1241 addPass(new Legalizer()); in addLegalizeMachineIR()
1247 addPass(createAMDGPUPostLegalizeCombiner(IsOptNone)); in addPreRegBankSelect()
1251 addPass(new RegBankSelect()); in addRegBankSelect()
1257 addPass(createAMDGPURegBankCombiner(IsOptNone)); in addPreGlobalInstructionSelect()
1261 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
1267 addPass(createAMDGPUMachineCFGStructurizerPass()); in addPreRegAlloc()
1322 addPass(&GCNNSAReassignID); in addPreRewrite()
1367 addPass(createSGPRAllocPass(false)); in addRegAssignAndRewriteFast()
1370 addPass(&SILowerSGPRSpillsID); in addRegAssignAndRewriteFast()
1372 addPass(createVGPRAllocPass(false)); in addRegAssignAndRewriteFast()
1380 addPass(createSGPRAllocPass(true)); in addRegAssignAndRewriteOptimized()
1386 addPass(createVirtRegRewriter(false)); in addRegAssignAndRewriteOptimized()
1389 addPass(&SILowerSGPRSpillsID); in addRegAssignAndRewriteOptimized()
1391 addPass(createVGPRAllocPass(true)); in addRegAssignAndRewriteOptimized()
1394 addPass(&VirtRegRewriterID); in addRegAssignAndRewriteOptimized()
1400 addPass(&SIFixVGPRCopiesID); in addPostRegAlloc()
1402 addPass(&SIOptimizeExecMaskingID); in addPostRegAlloc()
1408 addPass(createSIShrinkInstructionsPass()); in addPreSched2()
1409 addPass(&SIPostRABundlerID); in addPreSched2()
1414 addPass(&GCNCreateVOPDID); in addPreEmitPass()
1415 addPass(createSIMemoryLegalizerPass()); in addPreEmitPass()
1416 addPass(createSIInsertWaitcntsPass()); in addPreEmitPass()
1418 addPass(createSIModeRegisterPass()); in addPreEmitPass()
1421 addPass(&SIInsertHardClausesID); in addPreEmitPass()
1423 addPass(&SILateBranchLoweringPassID); in addPreEmitPass()
1425 addPass(createAMDGPUSetWavePriorityPass()); in addPreEmitPass()
1427 addPass(&SIPreEmitPeepholeID); in addPreEmitPass()
1436 addPass(&PostRAHazardRecognizerID); in addPreEmitPass()
1439 addPass(&AMDGPUReleaseVGPRsID); in addPreEmitPass()
1442 addPass(&AMDGPUInsertDelayAluID); in addPreEmitPass()
1444 addPass(&BranchRelaxationPassID); in addPreEmitPass()