Lines Matching refs:S32
127 const LLT S32 = LLT::scalar(32); in applyBank() local
129 assert(MRI.getType(DstReg) == S32); in applyBank()
135 auto True = B.buildConstant(S32, Opc == AMDGPU::G_SEXT ? -1 : 1); in applyBank()
136 auto False = B.buildConstant(S32, 0); in applyBank()
701 LLT S32 = LLT::scalar(32); in buildReadFirstLane() local
709 auto Unmerge = B.buildUnmerge(S32, Src); in buildReadFirstLane()
717 MRI.setType(DstPart, NumParts == 1 ? Ty : S32); in buildReadFirstLane()
1083 const LLT S32 = LLT::scalar(32); in applyMappingLoad() local
1086 auto WideLoad = B.buildLoadFromOffset(S32, PtrReg, *MMO, 0); in applyMappingLoad()
1090 auto WideLoad = B.buildLoadFromOffset(S32, PtrReg, *MMO, 0); in applyMappingLoad()
1252 const LLT S32 = LLT::scalar(32); in setBufferOffsets() local
1259 VOffsetReg = B.buildConstant(S32, 0).getReg(0); in setBufferOffsets()
1260 SOffsetReg = B.buildConstant(S32, SOffset).getReg(0); in setBufferOffsets()
1280 SOffsetReg = B.buildConstant(S32, SOffset).getReg(0); in setBufferOffsets()
1288 VOffsetReg = B.buildConstant(S32, 0).getReg(0); in setBufferOffsets()
1323 VOffsetReg = B.buildCopy(S32, CombinedOffset).getReg(0); in setBufferOffsets()
1327 SOffsetReg = B.buildConstant(S32, 0).getReg(0); in setBufferOffsets()
1337 const LLT S32 = LLT::scalar(32); in applyMappingSBufferLoad() local
1389 Register VIndex = B.buildConstant(S32, 0).getReg(0); in applyMappingSBufferLoad()
1462 const LLT S32 = LLT::scalar(32); in applyMappingBFE() local
1472 if (Ty == S32) in applyMappingBFE()
1484 auto UnmergeSOffset = B.buildUnmerge({S32, S32}, ShiftOffset); in applyMappingBFE()
1491 auto Zero = B.buildConstant(S32, 0); in applyMappingBFE()
1497 Signed ? B.buildSbfx(S32, UnmergeSOffset.getReg(0), Zero, WidthReg) in applyMappingBFE()
1498 : B.buildUbfx(S32, UnmergeSOffset.getReg(0), Zero, WidthReg); in applyMappingBFE()
1500 Signed ? B.buildAShr(S32, Extract, B.buildConstant(S32, 31)) : Zero; in applyMappingBFE()
1505 auto UpperWidth = B.buildConstant(S32, WidthImm - 32); in applyMappingBFE()
1508 ? B.buildSbfx(S32, UnmergeSOffset.getReg(1), Zero, UpperWidth) in applyMappingBFE()
1509 : B.buildUbfx(S32, UnmergeSOffset.getReg(1), Zero, UpperWidth); in applyMappingBFE()
1518 auto ExtShift = B.buildSub(S32, B.buildConstant(S32, 64), WidthReg); in applyMappingBFE()
1534 auto OffsetMask = B.buildConstant(S32, maskTrailingOnes<unsigned>(6)); in applyMappingBFE()
1535 auto ClampOffset = B.buildAnd(S32, OffsetReg, OffsetMask); in applyMappingBFE()
1538 auto ShiftWidth = B.buildShl(S32, WidthReg, B.buildConstant(S32, 16)); in applyMappingBFE()
1543 auto MergedInputs = B.buildOr(S32, ClampOffset, ShiftWidth); in applyMappingBFE()
1547 unsigned Opc = Ty == S32 ? (Signed ? AMDGPU::S_BFE_I32 : AMDGPU::S_BFE_U32) : in applyMappingBFE()
1577 LLT S32 = LLT::scalar(32); in applyMappingMAD_64_32() local
1591 Register DstLo = B.buildMul(S32, Src0, Src1).getReg(0); in applyMappingMAD_64_32()
1597 DstHi = IsUnsigned ? B.buildUMulH(S32, Src0, Src1).getReg(0) in applyMappingMAD_64_32()
1598 : B.buildSMulH(S32, Src0, Src1).getReg(0); in applyMappingMAD_64_32()
1601 Register VSrc0 = B.buildCopy(S32, Src0).getReg(0); in applyMappingMAD_64_32()
1602 Register VSrc1 = B.buildCopy(S32, Src1).getReg(0); in applyMappingMAD_64_32()
1607 DstHi = IsUnsigned ? B.buildUMulH(S32, VSrc0, VSrc1).getReg(0) in applyMappingMAD_64_32()
1608 : B.buildSMulH(S32, VSrc0, VSrc1).getReg(0); in applyMappingMAD_64_32()
1625 LLT CarryType = DstOnValu ? S1 : S32; in applyMappingMAD_64_32()
1634 Zero = B.buildConstant(S32, 0).getReg(0); in applyMappingMAD_64_32()
1638 Carry = B.buildICmp(CmpInst::ICMP_SLT, MulHiInVgpr ? S1 : S32, DstHi, Zero) in applyMappingMAD_64_32()
1651 DstLo = B.buildCopy(S32, DstLo).getReg(0); in applyMappingMAD_64_32()
1652 DstHi = B.buildCopy(S32, DstHi).getReg(0); in applyMappingMAD_64_32()
1657 auto Unmerge = B.buildUnmerge(S32, Src2); in applyMappingMAD_64_32()
1671 auto AddLo = B.buildUAddo(S32, CarryType, DstLo, Src2Lo); in applyMappingMAD_64_32()
1677 auto AddHi = B.buildUAdde(S32, CarryType, DstHi, Src2Hi, CarryLo); in applyMappingMAD_64_32()
1729 const LLT S32 = LLT::scalar(32); in unpackV2S16ToS32() local
1730 auto Bitcast = B.buildBitcast(S32, Src); in unpackV2S16ToS32()
1733 auto ExtLo = B.buildSExtInReg(S32, Bitcast, 16); in unpackV2S16ToS32()
1734 auto ShiftHi = B.buildAShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1738 auto ShiftHi = B.buildLShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1740 auto ExtLo = B.buildAnd(S32, Bitcast, B.buildConstant(S32, 0xffff)); in unpackV2S16ToS32()
1781 const LLT S32 = LLT::scalar(32); in handleD16VData() local
1784 return B.buildMerge(LLT::fixed_vector(NumElts, S32), WideRegs).getReg(0); in handleD16VData()
1807 const LLT S32 = LLT::scalar(32); in splitBufferOffsets() local
1831 BaseReg = B.buildConstant(S32, Overflow).getReg(0); in splitBufferOffsets()
1833 auto OverflowVal = B.buildConstant(S32, Overflow); in splitBufferOffsets()
1834 BaseReg = B.buildAdd(S32, BaseReg, OverflowVal).getReg(0); in splitBufferOffsets()
1840 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
1885 const LLT S32 = LLT::scalar(32); in reinsertVectorIndexAdd() local
1889 auto MaterializedOffset = B.buildConstant(S32, ConstOffset); in reinsertVectorIndexAdd()
1891 auto Add = B.buildAdd(S32, WaterfallIdx, MaterializedOffset); in reinsertVectorIndexAdd()
1946 LLT S32 = LLT::scalar(32); in foldExtractEltToCmpSelect() local
1958 LLT CCTy = (CCBank == AMDGPU::SGPRRegBank) ? S32 : LLT::scalar(1); in foldExtractEltToCmpSelect()
1961 Idx = B.buildCopy(S32, Idx)->getOperand(0).getReg(); in foldExtractEltToCmpSelect()
1979 auto IC = B.buildConstant(S32, I); in foldExtractEltToCmpSelect()
2044 LLT S32 = LLT::scalar(32); in foldInsertEltToCmpSelect() local
2059 LLT CCTy = (CCBank == AMDGPU::SGPRRegBank) ? S32 : LLT::scalar(1); in foldInsertEltToCmpSelect()
2062 Idx = B.buildCopy(S32, Idx)->getOperand(0).getReg(); in foldInsertEltToCmpSelect()
2080 auto IC = B.buildConstant(S32, I); in foldInsertEltToCmpSelect()
2124 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2162 if (Helper.widenScalar(MI, 0, S32) != LegalizerHelper::Legalized) in applyMappingImpl()
2186 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2187 Register NewDstReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2193 Register NewSrcReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2224 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2225 Register NewCondReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2276 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2277 Register NewCondReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2395 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2410 auto Lo = B.buildInstr(MI.getOpcode(), {S32}, {WideSrc0Lo, WideSrc1Lo}); in applyMappingImpl()
2411 auto Hi = B.buildInstr(MI.getOpcode(), {S32}, {WideSrc0Hi, WideSrc1Hi}); in applyMappingImpl()
2417 if (Helper.widenScalar(MI, 0, S32) != LegalizerHelper::Legalized) in applyMappingImpl()
2424 if (Helper.widenScalar(MI, 1, S32) != LegalizerHelper::Legalized) in applyMappingImpl()
2436 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2457 B.buildAShr(DstRegs[1], DstRegs[0], B.buildConstant(S32, 31)); in applyMappingImpl()
2477 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2479 if (Ty == S32) in applyMappingImpl()
2488 if (Helper.narrowScalar(MI, 1, S32) != LegalizerHelper::Legalized) in applyMappingImpl()
2502 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2504 if (Ty == S32) in applyMappingImpl()
2522 auto X = B.buildInstr(NewOpc, {S32}, {SrcRegs[Idx]}); in applyMappingImpl()
2523 auto Y = B.buildInstr(NewOpc, {S32}, {SrcRegs[Idx ^ 1]}); in applyMappingImpl()
2528 Y = B.buildInstr(AddOpc, {S32}, {Y, B.buildConstant(S32, 32)}); in applyMappingImpl()
2636 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2647 ZextLo = B.buildZExt(S32, Lo).getReg(0); in applyMappingImpl()
2650 Register ZextHi = B.buildZExt(S32, Hi).getReg(0); in applyMappingImpl()
2653 auto ShiftAmt = B.buildConstant(S32, 16); in applyMappingImpl()
2656 ShiftHi = B.buildShl(S32, ZextHi, ShiftAmt).getReg(0); in applyMappingImpl()
2659 Register MaskLo = B.buildConstant(S32, 0xffff).getReg(0); in applyMappingImpl()
2662 auto ShiftAmt = B.buildConstant(S32, 16); in applyMappingImpl()
2665 ShiftHi = B.buildShl(S32, Hi, ShiftAmt).getReg(0); in applyMappingImpl()
2668 ZextLo = B.buildAnd(S32, Lo, MaskLo).getReg(0); in applyMappingImpl()
2672 auto Or = B.buildOr(S32, ZextLo, ShiftHi); in applyMappingImpl()
2687 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2755 auto One = B.buildConstant(S32, 1); in applyMappingImpl()
2766 auto IdxLo = B.buildShl(S32, BaseIdxReg, One); in applyMappingImpl()
2767 auto IdxHi = B.buildAdd(S32, IdxLo, One); in applyMappingImpl()
2793 Register TmpReg0 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2794 Register TmpReg1 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2868 const LLT S32 = LLT::scalar(32); in applyMappingImpl() local
2873 auto One = B.buildConstant(S32, 1); in applyMappingImpl()
2882 auto IdxLo = B.buildShl(S32, BaseIdxReg, One); in applyMappingImpl()
2883 auto IdxHi = B.buildAdd(S32, IdxLo, One); in applyMappingImpl()