Lines Matching refs:MRI
101 MachineRegisterInfo &MRI; member in __anonf9a34fae0111::ApplyRegBankMapping
108 : RBI(RBI_), MRI(MRI_), NewBank(RB) {} in ApplyRegBankMapping()
125 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, MRI, *RBI.TRI); in applyBank()
128 assert(MRI.getType(SrcReg) == LLT::scalar(1)); in applyBank()
129 assert(MRI.getType(DstReg) == S32); in applyBank()
138 MRI.setRegBank(True.getReg(0), *NewBank); in applyBank()
139 MRI.setRegBank(False.getReg(0), *NewBank); in applyBank()
143 assert(!MRI.getRegClassOrRegBank(DstReg)); in applyBank()
144 MRI.setRegBank(DstReg, *NewBank); in applyBank()
151 const RegisterBank *DstBank = RBI.getRegBank(DstReg, MRI, *RBI.TRI); in applyBank()
162 if (Reg.isPhysical() || MRI.getRegClassOrRegBank(Reg)) in applyBank()
166 if (MRI.getType(Reg) == LLT::scalar(1)) { in applyBank()
175 MRI.setRegBank(Reg, *RB); in applyBank()
298 const MachineInstr &MI, const MachineRegisterInfo &MRI, in addMappingFromTable() argument
309 Sizes[I] = getSizeInBits(Reg, MRI, *TRI); in addMappingFromTable()
313 unsigned SizeI = getSizeInBits(MI.getOperand(I).getReg(), MRI, *TRI); in addMappingFromTable()
335 const MachineInstr &MI, const MachineRegisterInfo &MRI) const { in getInstrAlternativeMappingsIntrinsic()
347 return addMappingFromTable<3>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsic()
366 return addMappingFromTable<4>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsic()
375 const MachineInstr &MI, const MachineRegisterInfo &MRI) const { in getInstrAlternativeMappingsIntrinsicWSideEffects()
395 return addMappingFromTable<2>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsicWSideEffects()
409 return addMappingFromTable<3>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsicWSideEffects()
423 return addMappingFromTable<1>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsicWSideEffects()
457 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
463 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
471 return addMappingFromTable<1>(MI, MRI, {{ 0 }}, Table); in getInstrAlternativeMappings()
484 return addMappingFromTable<1>(MI, MRI, {{ 0 }}, Table); in getInstrAlternativeMappings()
489 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
534 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
535 LLT PtrTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrAlternativeMappings()
568 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
591 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
613 assert(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits() == 1); in getInstrAlternativeMappings()
630 return getInstrAlternativeMappingsIntrinsic(MI, MRI); in getInstrAlternativeMappings()
632 return getInstrAlternativeMappingsIntrinsicWSideEffects(MI, MRI); in getInstrAlternativeMappings()
645 MachineRegisterInfo *MRI = B.getMRI(); in split64BitValueForMapping() local
646 Register LoLHS = MRI->createGenericVirtualRegister(HalfTy); in split64BitValueForMapping()
647 Register HiLHS = MRI->createGenericVirtualRegister(HalfTy); in split64BitValueForMapping()
648 const RegisterBank *Bank = getRegBank(Reg, *MRI, *TRI); in split64BitValueForMapping()
649 MRI->setRegBank(LoLHS, *Bank); in split64BitValueForMapping()
650 MRI->setRegBank(HiLHS, *Bank); in split64BitValueForMapping()
662 static void setRegsToType(MachineRegisterInfo &MRI, ArrayRef<Register> Regs, in setRegsToType() argument
665 assert(MRI.getType(Reg).getSizeInBits() == NewTy.getSizeInBits()); in setRegsToType()
666 MRI.setType(Reg, NewTy); in setRegsToType()
684 MachineRegisterInfo &MRI, in buildReadFirstLane() argument
686 LLT Ty = MRI.getType(Src); in buildReadFirstLane()
687 const RegisterBank *Bank = getRegBank(Src, MRI, *TRI); in buildReadFirstLane()
698 MRI.setRegBank(Src, AMDGPU::VGPRRegBank); in buildReadFirstLane()
716 Register DstPart = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in buildReadFirstLane()
717 MRI.setType(DstPart, NumParts == 1 ? Ty : S32); in buildReadFirstLane()
720 constrainGenericRegister(SrcPart, AMDGPU::VGPR_32RegClass, MRI); in buildReadFirstLane()
733 MRI.setRegBank(Dst, AMDGPU::SGPRRegBank); in buildReadFirstLane()
759 MachineRegisterInfo &MRI) const { in executeInWaterfallLoop()
785 Register SaveExecReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
786 Register InitSaveExecReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
792 Register PhiExec = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
793 Register NewExec = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
865 LLT OpTy = MRI.getType(OpReg); in executeInWaterfallLoop()
867 const RegisterBank *OpBank = getRegBank(OpReg, MRI, *TRI); in executeInWaterfallLoop()
872 MRI.setRegBank(OpReg, AMDGPU::VGPRRegBank); in executeInWaterfallLoop()
876 Register CurrentLaneReg = buildReadFirstLane(B, MRI, OpReg); in executeInWaterfallLoop()
896 MRI.setRegBank(OpParts[i], AMDGPU::VGPRRegBank); in executeInWaterfallLoop()
897 MRI.setRegBank(CurrentLaneParts[i], AMDGPU::SGPRRegBank); in executeInWaterfallLoop()
904 MRI.setRegBank(CmpReg, AMDGPU::VCCRegBank); in executeInWaterfallLoop()
910 MRI.setRegBank(CondReg, AMDGPU::VCCRegBank); in executeInWaterfallLoop()
927 MRI.setRegClass(CondReg, WaveRC); in executeInWaterfallLoop()
934 MRI.setSimpleHint(NewExec, CondReg); in executeInWaterfallLoop()
973 MachineRegisterInfo &MRI, ArrayRef<unsigned> OpIndices) const { in collectWaterfallOperands() argument
977 const RegisterBank *OpBank = getRegBank(Reg, MRI, *TRI); in collectWaterfallOperands()
987 MachineIRBuilder &B, MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop() argument
993 if (!collectWaterfallOperands(SGPROperandRegs, MI, MRI, OpIndices)) in executeInWaterfallLoop()
998 SGPROperandRegs, MRI); in executeInWaterfallLoop()
1002 MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop() argument
1005 return executeInWaterfallLoop(B, MI, MRI, OpIndices); in executeInWaterfallLoop()
1010 MachineInstr &MI, MachineRegisterInfo &MRI, unsigned OpIdx) const { in constrainOpWithReadfirstlane() argument
1012 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI); in constrainOpWithReadfirstlane()
1018 Reg = buildReadFirstLane(B, MRI, Reg); in constrainOpWithReadfirstlane()
1051 MachineRegisterInfo &MRI) const { in applyMappingLoad()
1053 const LLT LoadTy = MRI.getType(DstReg); in applyMappingLoad()
1077 ApplyRegBankMapping O(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingLoad()
1100 ApplyRegBankMapping ApplyBank(*this, MRI, DstBank); in applyMappingLoad()
1140 LLT PtrTy = MRI.getType(MI.getOperand(1).getReg()); in applyMappingLoad()
1141 MRI.setType(BasePtrReg, PtrTy); in applyMappingLoad()
1145 ApplyRegBankMapping Observer(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingLoad()
1157 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingLoad()
1164 MachineRegisterInfo &MRI) const { in applyMappingDynStackAlloc()
1178 const RegisterBank *SizeBank = getRegBank(AllocSize, MRI, *TRI); in applyMappingDynStackAlloc()
1184 LLT PtrTy = MRI.getType(Dst); in applyMappingDynStackAlloc()
1189 ApplyRegBankMapping ApplyBank(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingDynStackAlloc()
1210 MachineRegisterInfo &MRI, int RsrcIdx) const { in applyMappingImage() argument
1231 executeInWaterfallLoop(MI, MRI, SGPRIndexes); in applyMappingImage()
1235 static Register getSrcRegIgnoringCopies(const MachineRegisterInfo &MRI, in getSrcRegIgnoringCopies() argument
1237 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getSrcRegIgnoringCopies()
1253 MachineRegisterInfo *MRI = B.getMRI(); in setBufferOffsets() local
1255 if (Optional<int64_t> Imm = getIConstantVRegSExtVal(CombinedOffset, *MRI)) { in setBufferOffsets()
1273 AMDGPU::getBaseWithConstantOffset(*MRI, CombinedOffset); in setBufferOffsets()
1278 if (RBI.getRegBank(Base, *MRI, *RBI.TRI) == &AMDGPU::VGPRRegBank) { in setBufferOffsets()
1297 MachineInstr *Add = getOpcodeDef(AMDGPU::G_ADD, CombinedOffset, *MRI); in setBufferOffsets()
1299 Register Src0 = getSrcRegIgnoringCopies(*MRI, Add->getOperand(1).getReg()); in setBufferOffsets()
1300 Register Src1 = getSrcRegIgnoringCopies(*MRI, Add->getOperand(2).getReg()); in setBufferOffsets()
1302 const RegisterBank *Src0Bank = RBI.getRegBank(Src0, *MRI, *RBI.TRI); in setBufferOffsets()
1303 const RegisterBank *Src1Bank = RBI.getRegBank(Src1, *MRI, *RBI.TRI); in setBufferOffsets()
1320 if (RBI.getRegBank(CombinedOffset, *MRI, *RBI.TRI) == &AMDGPU::VGPRRegBank) { in setBufferOffsets()
1335 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingSBufferLoad() local
1339 LLT Ty = MRI.getType(Dst); in applyMappingSBufferLoad()
1401 LoadParts[i] = MRI.createGenericVirtualRegister(Ty); in applyMappingSBufferLoad()
1402 MRI.setRegBank(LoadParts[i], AMDGPU::VGPRRegBank); in applyMappingSBufferLoad()
1434 OpsToWaterfall, MRI); in applyMappingSBufferLoad()
1454 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingBFE() local
1460 LLT Ty = MRI.getType(DstReg); in applyMappingBFE()
1477 ApplyRegBankMapping ApplyBank(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingBFE()
1488 if (auto ConstWidth = getIConstantVRegValWithLookThrough(WidthReg, MRI)) { in applyMappingBFE()
1530 ApplyRegBankMapping ApplyBank(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingBFE()
1561 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingMAD_64_32() local
1572 if (MRI.getRegBankOrNull(Src0) == &AMDGPU::VGPRRegBank) in applyMappingMAD_64_32()
1579 bool DstOnValu = MRI.getRegBankOrNull(Src2) == &AMDGPU::VGPRRegBank; in applyMappingMAD_64_32()
1583 if (mi_match(Src2, MRI, m_ZeroInt())) in applyMappingMAD_64_32()
1594 MRI.setRegBank(DstLo, AMDGPU::SGPRRegBank); in applyMappingMAD_64_32()
1599 MRI.setRegBank(DstHi, AMDGPU::SGPRRegBank); in applyMappingMAD_64_32()
1604 MRI.setRegBank(VSrc0, AMDGPU::VGPRRegBank); in applyMappingMAD_64_32()
1605 MRI.setRegBank(VSrc1, AMDGPU::VGPRRegBank); in applyMappingMAD_64_32()
1609 MRI.setRegBank(DstHi, AMDGPU::VGPRRegBank); in applyMappingMAD_64_32()
1612 DstHi = buildReadFirstLane(B, MRI, DstHi); in applyMappingMAD_64_32()
1635 MRI.setRegBank(Zero, in applyMappingMAD_64_32()
1640 MRI.setRegBank(Carry, MulHiInVgpr ? AMDGPU::VCCRegBank in applyMappingMAD_64_32()
1645 MRI.setRegBank(Carry, AMDGPU::VCCRegBank); in applyMappingMAD_64_32()
1653 MRI.setRegBank(DstLo, AMDGPU::VGPRRegBank); in applyMappingMAD_64_32()
1654 MRI.setRegBank(DstHi, AMDGPU::VGPRRegBank); in applyMappingMAD_64_32()
1660 MRI.setRegBank(Src2Lo, DstBank); in applyMappingMAD_64_32()
1661 MRI.setRegBank(Src2Hi, DstBank); in applyMappingMAD_64_32()
1665 MRI.setRegBank(Src2Sign.getReg(0), CarryBank); in applyMappingMAD_64_32()
1668 MRI.setRegBank(Carry, CarryBank); in applyMappingMAD_64_32()
1674 MRI.setRegBank(DstLo, DstBank); in applyMappingMAD_64_32()
1675 MRI.setRegBank(CarryLo, CarryBank); in applyMappingMAD_64_32()
1679 MRI.setRegBank(DstHi, DstBank); in applyMappingMAD_64_32()
1682 MRI.setRegBank(CarryHi, CarryBank); in applyMappingMAD_64_32()
1688 MRI.setRegBank(Carry, CarryBank); in applyMappingMAD_64_32()
1693 MRI.setRegBank(Carry, CarryBank); in applyMappingMAD_64_32()
1764 MachineRegisterInfo &MRI, in handleD16VData() argument
1770 LLT StoreVT = MRI.getType(Reg); in handleD16VData()
1788 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() argument
1790 if (mi_match(Reg, MRI, m_ICst(Const))) in getBaseWithConstantOffset()
1794 if (mi_match(Reg, MRI, m_GAdd(m_Reg(Base), m_ICst(Const)))) in getBaseWithConstantOffset()
1847 MachineRegisterInfo &MRI = *B.getMRI(); in buildVCopy() local
1848 LLT SrcTy = MRI.getType(SrcReg); in buildVCopy()
1854 return constrainGenericRegister(DstReg, AMDGPU::VGPR_32RegClass, MRI) && in buildVCopy()
1855 constrainGenericRegister(SrcReg, AMDGPU::SReg_32RegClass, MRI); in buildVCopy()
1858 Register TmpReg0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in buildVCopy()
1859 Register TmpReg1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in buildVCopy()
1874 return constrainGenericRegister(SrcReg, AMDGPU::SReg_64RegClass, MRI) && in buildVCopy()
1875 constrainGenericRegister(DstReg, AMDGPU::VReg_64RegClass, MRI); in buildVCopy()
1884 MachineRegisterInfo &MRI = *B.getMRI(); in reinsertVectorIndexAdd() local
1892 MRI.setRegBank(MaterializedOffset.getReg(0), AMDGPU::SGPRRegBank); in reinsertVectorIndexAdd()
1893 MRI.setRegBank(Add.getReg(0), AMDGPU::SGPRRegBank); in reinsertVectorIndexAdd()
1926 MachineInstr &MI, MachineRegisterInfo &MRI, in foldExtractEltToCmpSelect() argument
1937 LLT VecTy = MRI.getType(VecReg); in foldExtractEltToCmpSelect()
1962 MRI.setRegBank(Idx, AMDGPU::VGPRRegBank); in foldExtractEltToCmpSelect()
1971 EltTy = MRI.getType(DstRegs[0]); in foldExtractEltToCmpSelect()
1980 MRI.setRegBank(IC->getOperand(0).getReg(), AMDGPU::SGPRRegBank); in foldExtractEltToCmpSelect()
1982 MRI.setRegBank(Cmp->getOperand(0).getReg(), CCBank); in foldExtractEltToCmpSelect()
1989 MRI.setRegBank(S->getOperand(N).getReg(), DstBank); in foldExtractEltToCmpSelect()
1998 MRI.setRegBank(DstReg, DstBank); in foldExtractEltToCmpSelect()
2001 MRI.setRegBank(MI.getOperand(0).getReg(), DstBank); in foldExtractEltToCmpSelect()
2009 static Register constrainRegToBank(MachineRegisterInfo &MRI, in constrainRegToBank() argument
2012 const RegisterBank *CurrBank = MRI.getRegBankOrNull(Reg); in constrainRegToBank()
2014 Register Copy = B.buildCopy(MRI.getType(Reg), Reg).getReg(0); in constrainRegToBank()
2015 MRI.setRegBank(Copy, Bank); in constrainRegToBank()
2019 MRI.setRegBank(Reg, Bank); in constrainRegToBank()
2024 MachineInstr &MI, MachineRegisterInfo &MRI, in foldInsertEltToCmpSelect() argument
2035 LLT VecTy = MRI.getType(VecReg); in foldInsertEltToCmpSelect()
2063 MRI.setRegBank(Idx, AMDGPU::VGPRRegBank); in foldInsertEltToCmpSelect()
2073 EltTy = MRI.getType(InsRegs[0]); in foldInsertEltToCmpSelect()
2081 MRI.setRegBank(IC->getOperand(0).getReg(), AMDGPU::SGPRRegBank); in foldInsertEltToCmpSelect()
2083 MRI.setRegBank(Cmp->getOperand(0).getReg(), CCBank); in foldInsertEltToCmpSelect()
2086 Register Op0 = constrainRegToBank(MRI, B, InsRegs[L], DstBank); in foldInsertEltToCmpSelect()
2088 Op1 = constrainRegToBank(MRI, B, Op1, DstBank); in foldInsertEltToCmpSelect()
2091 MRI.setRegBank(Select, DstBank); in foldInsertEltToCmpSelect()
2098 if (MergeTy == MRI.getType(MI.getOperand(0).getReg())) { in foldInsertEltToCmpSelect()
2102 MRI.setRegBank(Vec->getOperand(0).getReg(), DstBank); in foldInsertEltToCmpSelect()
2106 MRI.setRegBank(MI.getOperand(0).getReg(), DstBank); in foldInsertEltToCmpSelect()
2116 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
2120 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2138 const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI); in applyMappingImpl()
2145 MRI.setRegBank(Copy.getReg(0), AMDGPU::VCCRegBank); in applyMappingImpl()
2158 ApplyRegBankMapping ApplyBank(*this, MRI, DstBank); in applyMappingImpl()
2187 Register NewDstReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2188 MRI.setRegBank(NewDstReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2193 Register NewSrcReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2194 MRI.setRegBank(NewSrcReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2212 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2221 const RegisterBank *CondBank = getRegBank(CondRegs[0], MRI, *TRI); in applyMappingImpl()
2225 Register NewCondReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2226 MRI.setRegBank(NewCondReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2251 setRegsToType(MRI, Src1Regs, HalfTy); in applyMappingImpl()
2257 setRegsToType(MRI, Src2Regs, HalfTy); in applyMappingImpl()
2259 setRegsToType(MRI, DefRegs, HalfTy); in applyMappingImpl()
2264 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingImpl()
2277 Register NewCondReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2278 MRI.setRegBank(NewCondReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2293 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2302 ApplyRegBankMapping ApplyBank(*this, MRI, DstBank); in applyMappingImpl()
2338 setRegsToType(MRI, Src0Regs, HalfTy); in applyMappingImpl()
2343 setRegsToType(MRI, Src1Regs, HalfTy); in applyMappingImpl()
2345 setRegsToType(MRI, DefRegs, HalfTy); in applyMappingImpl()
2350 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingImpl()
2356 const RegisterBank *SrcBank = MRI.getRegBankOrNull(SrcReg); in applyMappingImpl()
2362 ApplyRegBankMapping Apply(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingImpl()
2383 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2398 ApplyRegBankMapping ApplySALU(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingImpl()
2438 ApplyRegBankMapping O(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingImpl()
2465 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingImpl()
2478 LLT Ty = MRI.getType(SrcReg); in applyMappingImpl()
2482 ApplyRegBankMapping ApplyVALU(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingImpl()
2503 LLT Ty = MRI.getType(SrcReg); in applyMappingImpl()
2513 ApplyRegBankMapping ApplyVALU(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingImpl()
2538 LLT SrcTy = MRI.getType(SrcReg); in applyMappingImpl()
2548 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2569 MRI.setRegBank(DstReg, *SrcBank); in applyMappingImpl()
2595 MRI.setRegBank(True.getReg(0), *DstBank); in applyMappingImpl()
2596 MRI.setRegBank(False.getReg(0), *DstBank); in applyMappingImpl()
2597 MRI.setRegBank(DstReg, *DstBank); in applyMappingImpl()
2604 MRI.setRegBank(Sel.getReg(0), *DstBank); in applyMappingImpl()
2619 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2648 MRI.setRegBank(ZextLo, *BankLo); in applyMappingImpl()
2651 MRI.setRegBank(ZextHi, *BankHi); in applyMappingImpl()
2654 MRI.setRegBank(ShiftAmt.getReg(0), *BankHi); in applyMappingImpl()
2657 MRI.setRegBank(ShiftHi, *BankHi); in applyMappingImpl()
2660 MRI.setRegBank(MaskLo, *BankLo); in applyMappingImpl()
2663 MRI.setRegBank(ShiftAmt.getReg(0), *BankHi); in applyMappingImpl()
2666 MRI.setRegBank(ShiftHi, *BankHi); in applyMappingImpl()
2669 MRI.setRegBank(ZextLo, *BankLo); in applyMappingImpl()
2673 MRI.setRegBank(Or.getReg(0), *DstBank); in applyMappingImpl()
2688 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2689 LLT SrcTy = MRI.getType(SrcReg); in applyMappingImpl()
2691 if (foldExtractEltToCmpSelect(MI, MRI, OpdMapper)) in applyMappingImpl()
2707 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(2).getReg()); in applyMappingImpl()
2730 executeInWaterfallLoop(MI, MRI, { 2 }); in applyMappingImpl()
2734 Register TmpReg = MRI.createGenericVirtualRegister(DstTy); in applyMappingImpl()
2735 MRI.setRegBank(TmpReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2772 MRI.setRegBank(DstReg, *DstBank); in applyMappingImpl()
2773 MRI.setRegBank(CastSrc.getReg(0), *SrcBank); in applyMappingImpl()
2774 MRI.setRegBank(One.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2775 MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2776 MRI.setRegBank(IdxHi.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2779 if (!collectWaterfallOperands(OpsToWaterfall, MI, MRI, { 2 })) { in applyMappingImpl()
2789 OpsToWaterfall, MRI); in applyMappingImpl()
2793 Register TmpReg0 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2794 Register TmpReg1 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2795 MRI.setRegBank(TmpReg0, AMDGPU::SGPRRegBank); in applyMappingImpl()
2796 MRI.setRegBank(TmpReg1, AMDGPU::SGPRRegBank); in applyMappingImpl()
2816 LLT VecTy = MRI.getType(DstReg); in applyMappingImpl()
2822 MRI.setType(MI.getOperand(1).getReg(), VecTy); in applyMappingImpl()
2824 if (foldInsertEltToCmpSelect(MI, MRI, OpdMapper)) in applyMappingImpl()
2832 LLT InsTy = MRI.getType(InsReg); in applyMappingImpl()
2838 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(3).getReg()); in applyMappingImpl()
2854 executeInWaterfallLoop(MI, MRI, { 3 }); in applyMappingImpl()
2895 MRI.setRegBank(InsReg, *InsSrcBank); in applyMappingImpl()
2896 MRI.setRegBank(CastSrc.getReg(0), *SrcBank); in applyMappingImpl()
2897 MRI.setRegBank(InsLo.getReg(0), *DstBank); in applyMappingImpl()
2898 MRI.setRegBank(InsHi.getReg(0), *DstBank); in applyMappingImpl()
2899 MRI.setRegBank(One.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2900 MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2901 MRI.setRegBank(IdxHi.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2905 if (!collectWaterfallOperands(OpsToWaterfall, MI, MRI, { 3 })) { in applyMappingImpl()
2918 OpsToWaterfall, MRI); in applyMappingImpl()
2949 executeInWaterfallLoop(MI, MRI, {1, 4}); in applyMappingImpl()
2965 executeInWaterfallLoop(MI, MRI, {2, 5}); in applyMappingImpl()
2972 executeInWaterfallLoop(MI, MRI, {2, 5}); in applyMappingImpl()
2977 executeInWaterfallLoop(MI, MRI, {3, 6}); in applyMappingImpl()
2994 constrainOpWithReadfirstlane(MI, MRI, 3); // Index in applyMappingImpl()
3003 constrainOpWithReadfirstlane(MI, MRI, 2); // Source value in applyMappingImpl()
3004 constrainOpWithReadfirstlane(MI, MRI, 3); // Index in applyMappingImpl()
3017 constrainOpWithReadfirstlane(MI, MRI, MI.getNumOperands() - 1); // Index in applyMappingImpl()
3031 constrainOpWithReadfirstlane(MI, MRI, 4); in applyMappingImpl()
3032 constrainOpWithReadfirstlane(MI, MRI, 5); in applyMappingImpl()
3057 applyMappingImage(MI, OpdMapper, MRI, RSrcIntrin->RsrcArg); in applyMappingImpl()
3063 executeInWaterfallLoop(MI, MRI, { N }); in applyMappingImpl()
3074 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3082 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3089 constrainOpWithReadfirstlane(MI, MRI, 1); // M0 in applyMappingImpl()
3094 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3100 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3104 constrainOpWithReadfirstlane(MI, MRI, 2); in applyMappingImpl()
3109 constrainOpWithReadfirstlane(MI, MRI, 1); // rsrc in applyMappingImpl()
3110 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3111 constrainOpWithReadfirstlane(MI, MRI, 5); // soffset in applyMappingImpl()
3116 constrainOpWithReadfirstlane(MI, MRI, 1); // rsrc in applyMappingImpl()
3117 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3118 constrainOpWithReadfirstlane(MI, MRI, 6); // soffset in applyMappingImpl()
3123 constrainOpWithReadfirstlane(MI, MRI, 2); in applyMappingImpl()
3129 constrainOpWithReadfirstlane(MI, MRI, MI.getNumOperands() - 1); // Index in applyMappingImpl()
3134 constrainOpWithReadfirstlane(MI, MRI, 8); // M0 in applyMappingImpl()
3143 applyMappingImage(MI, OpdMapper, MRI, RSrcIntrin->RsrcArg); in applyMappingImpl()
3158 if (!collectWaterfallOperands(SGPROperandRegs, MI, MRI, {1})) in applyMappingImpl()
3245 executeInWaterfallLoop(B, make_range(Start, End), SGPROperandRegs, MRI); in applyMappingImpl()
3251 if (applyMappingLoad(MI, OpdMapper, MRI)) in applyMappingImpl()
3256 applyMappingDynStackAlloc(MI, OpdMapper, MRI); in applyMappingImpl()
3310 unsigned AMDGPURegisterBankInfo::getMappingType(const MachineRegisterInfo &MRI, in getMappingType() argument
3318 if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) { in getMappingType()
3330 const MachineRegisterInfo &MRI = MF.getRegInfo(); in isSALUMapping() local
3335 if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) { in isSALUMapping()
3346 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingSOP() local
3354 unsigned Size = getSizeInBits(SrcOp.getReg(), MRI, *TRI); in getDefaultMappingSOP()
3364 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingVOP() local
3376 unsigned Size = getSizeInBits(Src.getReg(), MRI, *TRI); in getDefaultMappingVOP()
3388 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingAllVGPR() local
3396 unsigned Size = getSizeInBits(Op.getReg(), MRI, *TRI); in getDefaultMappingAllVGPR()
3405 AMDGPURegisterBankInfo::getImageMapping(const MachineRegisterInfo &MRI, in getImageMapping() argument
3426 unsigned Size = getSizeInBits(OpReg, MRI, *TRI); in getImageMapping()
3436 unsigned NewBank = getRegBankID(OpReg, MRI, AMDGPU::SGPRRegBankID); in getImageMapping()
3449 AMDGPURegisterBankInfo::getValueMappingForPtr(const MachineRegisterInfo &MRI, in getValueMappingForPtr() argument
3451 LLT PtrTy = MRI.getType(PtrReg); in getValueMappingForPtr()
3459 const RegisterBank *PtrBank = getRegBank(PtrReg, MRI, *TRI); in getValueMappingForPtr()
3467 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMappingForLoad() local
3469 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMappingForLoad()
3471 LLT PtrTy = MRI.getType(PtrReg); in getInstrMappingForLoad()
3478 const RegisterBank *PtrBank = getRegBank(PtrReg, MRI, *TRI); in getInstrMappingForLoad()
3512 const MachineRegisterInfo &MRI, in getRegBankID() argument
3514 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI); in getRegBankID()
3520 const MachineRegisterInfo &MRI, in getSGPROpMapping() argument
3524 unsigned Bank = getRegBankID(Reg, MRI, AMDGPU::SGPRRegBankID); in getSGPROpMapping()
3525 unsigned Size = getSizeInBits(Reg, MRI, TRI); in getSGPROpMapping()
3531 const MachineRegisterInfo &MRI, in getVGPROpMapping() argument
3533 unsigned Size = getSizeInBits(Reg, MRI, TRI); in getVGPROpMapping()
3539 const MachineRegisterInfo &MRI, in getAGPROpMapping() argument
3541 unsigned Size = getSizeInBits(Reg, MRI, TRI); in getAGPROpMapping()
3557 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
3562 const RegisterBank *DstBank = getRegBank(MI.getOperand(0).getReg(), MRI, in getInstrMapping()
3564 const RegisterBank *SrcBank = getRegBank(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
3570 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3592 auto OpBank = getRegBankID(MI.getOperand(I).getReg(), MRI); in getInstrMapping()
3600 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3617 if (const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI)) in getInstrMapping()
3622 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI); in getInstrMapping()
3637 unsigned Size = MRI.getType(DstReg).getSizeInBits(); in getInstrMapping()
3659 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3662 = getRegBank(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3674 BankLHS = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
3676 BankRHS = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
3680 BankLHS = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
3682 BankRHS = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
3710 unsigned Bank1 = getRegBankID(MI.getOperand(1).getReg(), MRI /*, DefaultBankID*/); in getInstrMapping()
3713 unsigned Bank2 = getRegBankID(MI.getOperand(2).getReg(), MRI /*, DefaultBankID*/); in getInstrMapping()
3807 if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) { in getInstrMapping()
3836 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3845 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3852 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3859 unsigned SrcBankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3874 unsigned BankID = getMappingType(MRI, MI); in getInstrMapping()
3875 unsigned DstSize = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3876 unsigned SrcSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3877 unsigned EltSize = getSizeInBits(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
3885 unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3886 unsigned DstSize = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3887 unsigned SrcSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3895 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
3898 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3899 unsigned Src0BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3900 unsigned Src1BankID = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
3913 unsigned Bank = getMappingType(MRI, MI); in getInstrMapping()
3914 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3915 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3929 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3930 unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3938 unsigned Size = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3939 unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3945 unsigned Size = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3946 unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3958 unsigned Bank = getRegBankID(Src, MRI); in getInstrMapping()
3959 unsigned DstSize = getSizeInBits(Dst, MRI, *TRI); in getInstrMapping()
3960 unsigned SrcSize = getSizeInBits(Src, MRI, *TRI); in getInstrMapping()
3971 unsigned DstSize = getSizeInBits(Dst, MRI, *TRI); in getInstrMapping()
3972 unsigned SrcSize = getSizeInBits(Src, MRI, *TRI); in getInstrMapping()
3975 const RegisterBank *SrcBank = getRegBank(Src, MRI, *TRI); in getInstrMapping()
3994 unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4003 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4010 OpdsMapping[1] = getValueMappingForPtr(MRI, MI.getOperand(1).getReg()); in getInstrMapping()
4015 unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4019 unsigned DstBank = getRegBankID(MI.getOperand(0).getReg(), MRI, in getInstrMapping()
4021 unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
4022 unsigned Op3Bank = getRegBankID(MI.getOperand(3).getReg(), MRI); in getInstrMapping()
4045 unsigned SrcBankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
4046 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4047 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
4048 unsigned IdxSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4049 unsigned IdxBank = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
4063 unsigned VecSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4064 unsigned InsertSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4065 unsigned IdxSize = MRI.getType(MI.getOperand(3).getReg()).getSizeInBits(); in getInstrMapping()
4066 unsigned InsertEltBankID = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
4067 unsigned IdxBankID = getRegBankID(MI.getOperand(3).getReg(), MRI); in getInstrMapping()
4087 unsigned Bank = getMappingType(MRI, MI); in getInstrMapping()
4092 unsigned Size = getSizeInBits(MI.getOperand(i).getReg(), MRI, *TRI); in getInstrMapping()
4113 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4116 OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4119 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4122 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4125 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4147 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4150 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4153 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4156 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4159 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4162 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4170 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4173 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4176 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4179 OpdsMapping[3] = getSGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4182 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4185 OpdsMapping[5] = getVGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4188 OpdsMapping[6] = getSGPROpMapping(MI.getOperand(6).getReg(), MRI, *TRI); in getInstrMapping()
4197 OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4198 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4206 unsigned Size0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4304 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4309 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4319 unsigned Dst0Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4320 unsigned Dst1Size = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
4324 unsigned SrcSize = MRI.getType(MI.getOperand(3).getReg()).getSizeInBits(); in getInstrMapping()
4332 unsigned Src0Size = MRI.getType(Src0Reg).getSizeInBits(); in getInstrMapping()
4333 unsigned Src1Size = MRI.getType(Src1Reg).getSizeInBits(); in getInstrMapping()
4334 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4342 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4345 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4353 unsigned IdxSize = MRI.getType(IdxReg).getSizeInBits(); in getInstrMapping()
4354 unsigned IdxBank = getRegBankID(IdxReg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4359 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4360 unsigned SrcSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4366 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4368 unsigned SrcSize = MRI.getType(SrcReg).getSizeInBits(); in getInstrMapping()
4369 unsigned SrcBank = getRegBankID(SrcReg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4371 unsigned IdxSize = MRI.getType(IdxReg).getSizeInBits(); in getInstrMapping()
4372 unsigned IdxBank = getRegBankID(IdxReg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4383 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4391 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4395 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4396 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4447 ? getAGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI) in getInstrMapping()
4448 : getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4449 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4450 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4453 ? getAGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI) in getInstrMapping()
4454 : getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4472 OpdsMapping[0] = getAGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4473 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4474 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4475 OpdsMapping[4] = getAGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4476 OpdsMapping[5] = getVGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4487 unsigned M0Bank = getRegBankID(M0Reg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4488 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4503 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4511 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4512 unsigned SrcSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4531 return getImageMapping(MRI, MI, RSrcIntrin->RsrcArg); in getInstrMapping()
4536 OpdsMapping[N] = getSGPROpMapping(MI.getOperand(N).getReg(), MRI, *TRI); in getInstrMapping()
4539 unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4546 unsigned Size = MRI.getType(MI.getOperand(I).getReg()).getSizeInBits(); in getInstrMapping()
4560 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4576 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4578 unsigned M0Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4586 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4588 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4607 OpdsMapping[8] = getSGPROpMapping(MI.getOperand(8).getReg(), MRI, *TRI); in getInstrMapping()
4612 unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4619 unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4625 unsigned Size = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4630 unsigned WaveSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4649 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4650 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4651 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4652 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4656 OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4657 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4658 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4659 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4665 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4666 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4667 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4668 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4673 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4674 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4675 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4676 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4677 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4681 OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4682 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4683 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4684 OpdsMapping[5] = getVGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4685 OpdsMapping[6] = getSGPROpMapping(MI.getOperand(6).getReg(), MRI, *TRI); in getInstrMapping()
4690 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4691 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4692 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4693 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4694 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4698 unsigned Size = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4708 unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4717 unsigned Bank = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
4723 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4724 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4730 unsigned M0Bank = getRegBankID(M0Reg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4731 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4744 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4745 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4753 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4754 unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4756 unsigned Op3Bank = getRegBankID(MI.getOperand(3).getReg(), MRI, in getInstrMapping()
4763 unsigned CondBank = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
4795 OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4801 auto OpBank = getRegBankID(Reg, MRI); in getInstrMapping()
4802 unsigned Size = getSizeInBits(Reg, MRI, *TRI); in getInstrMapping()
4829 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4830 OpdsMapping[1] = getValueMappingForPtr(MRI, MI.getOperand(1).getReg()); in getInstrMapping()
4831 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4835 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4836 OpdsMapping[1] = getValueMappingForPtr(MRI, MI.getOperand(1).getReg()); in getInstrMapping()
4837 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4838 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4842 unsigned Bank = getRegBankID(MI.getOperand(0).getReg(), MRI, in getInstrMapping()
4844 assert(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits() == 1); in getInstrMapping()