Lines Matching refs:MaxVGPRs
76 unsigned MaxVGPRs; member in __anon5770a2330111::AMDGPUPromoteAllocaImpl
180 MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first); in run()
184 MaxVGPRs = std::min(MaxVGPRs, 32u); in run()
186 MaxVGPRs = 128; in run()
383 unsigned MaxVGPRs) { in tryPromoteAllocaToVector() argument
400 : (MaxVGPRs * 32); in tryPromoteAllocaToVector()
404 << MaxVGPRs << " registers available\n"); in tryPromoteAllocaToVector()
850 if (tryPromoteAllocaToVector(&I, DL, MaxVGPRs)) in handleAlloca()
1070 bool handlePromoteAllocaToVector(AllocaInst &I, unsigned MaxVGPRs) { in handlePromoteAllocaToVector() argument
1079 return tryPromoteAllocaToVector(&I, Mod->getDataLayout(), MaxVGPRs); in handlePromoteAllocaToVector()
1090 unsigned MaxVGPRs; in promoteAllocasToVector() local
1093 MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first); in promoteAllocasToVector()
1097 MaxVGPRs = std::min(MaxVGPRs, 32u); in promoteAllocasToVector()
1099 MaxVGPRs = 128; in promoteAllocasToVector()
1112 if (handlePromoteAllocaToVector(*AI, MaxVGPRs)) in promoteAllocasToVector()