Lines Matching refs:getReg
1851 return B.buildShl(S32, GetReg, ShiftAmt).getReg(0); in getSegmentAperture()
1882 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in getSegmentAperture()
1884 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
1904 B.buildConstant(LLT::scalar(64), StructOffset).getReg(0)); in getSegmentAperture()
1905 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
1935 Register Dst = MI.getOperand(0).getReg(); in legalizeAddrSpaceCast()
1936 Register Src = MI.getOperand(1).getReg(); in legalizeAddrSpaceCast()
1974 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, FlatNull.getReg(0)); in legalizeAddrSpaceCast()
1975 B.buildSelect(Dst, CmpRes, PtrLo32, SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
1992 Register SrcAsInt = B.buildPtrToInt(S32, Src).getReg(0); in legalizeAddrSpaceCast()
2008 SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
2052 Register Src = MI.getOperand(1).getReg(); in legalizeFrint()
2070 B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2); in legalizeFrint()
2082 Register Src = MI.getOperand(1).getReg(); in legalizeFceil()
2099 B.buildFAdd(MI.getOperand(0).getReg(), Trunc, Add); in legalizeFceil()
2107 Register DstReg = MI.getOperand(0).getReg(); in legalizeFrem()
2108 Register Src0Reg = MI.getOperand(1).getReg(); in legalizeFrem()
2109 Register Src1Reg = MI.getOperand(2).getReg(); in legalizeFrem()
2132 .addUse(Const0.getReg(0)) in extractF64Exponent()
2133 .addUse(Const1.getReg(0)); in extractF64Exponent()
2145 Register Src = MI.getOperand(1).getReg(); in legalizeIntrinsicTrunc()
2150 Register Hi = Unmerge.getReg(1); in legalizeIntrinsicTrunc()
2178 B.buildSelect(MI.getOperand(0).getReg(), ExpGt51, Src, Tmp1); in legalizeIntrinsicTrunc()
2187 Register Dst = MI.getOperand(0).getReg(); in legalizeITOFP()
2188 Register Src = MI.getOperand(1).getReg(); in legalizeITOFP()
2199 auto CvtHi = Signed ? B.buildSITOFP(S64, Unmerge.getReg(1)) in legalizeITOFP()
2200 : B.buildUITOFP(S64, Unmerge.getReg(1)); in legalizeITOFP()
2202 auto CvtLo = B.buildUITOFP(S64, Unmerge.getReg(0)); in legalizeITOFP()
2204 .addUse(CvtHi.getReg(0)) in legalizeITOFP()
2205 .addUse(ThirtyTwo.getReg(0)); in legalizeITOFP()
2220 auto X = B.buildXor(S32, Unmerge.getReg(0), Unmerge.getReg(1)); in legalizeITOFP()
2225 .addUse(Unmerge.getReg(1)); in legalizeITOFP()
2229 ShAmt = B.buildCTLZ(S32, Unmerge.getReg(1)); in legalizeITOFP()
2232 auto Adjust = B.buildUMin(S32, One, Unmerge2.getReg(0)); in legalizeITOFP()
2233 auto Norm2 = B.buildOr(S32, Unmerge2.getReg(1), Adjust); in legalizeITOFP()
2238 .addUse(FVal.getReg(0)) in legalizeITOFP()
2239 .addUse(Scale.getReg(0)); in legalizeITOFP()
2251 Register Dst = MI.getOperand(0).getReg(); in legalizeFPTOI()
2252 Register Src = MI.getOperand(1).getReg(); in legalizeFPTOI()
2343 getIConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI); in legalizeExtractVectorElt()
2348 Register Dst = MI.getOperand(0).getReg(); in legalizeExtractVectorElt()
2349 Register Vec = MI.getOperand(1).getReg(); in legalizeExtractVectorElt()
2357 B.buildCopy(Dst, Unmerge.getReg(IdxVal)); in legalizeExtractVectorElt()
2377 getIConstantVRegValWithLookThrough(MI.getOperand(3).getReg(), MRI); in legalizeInsertVectorElt()
2382 Register Dst = MI.getOperand(0).getReg(); in legalizeInsertVectorElt()
2383 Register Vec = MI.getOperand(1).getReg(); in legalizeInsertVectorElt()
2384 Register Ins = MI.getOperand(2).getReg(); in legalizeInsertVectorElt()
2398 SrcRegs[IdxVal] = MI.getOperand(2).getReg(); in legalizeInsertVectorElt()
2413 Register Dst = MI.getOperand(0).getReg(); in legalizeShuffleVector()
2414 Register Src0 = MI.getOperand(1).getReg(); in legalizeShuffleVector()
2432 Register DstReg = MI.getOperand(0).getReg(); in legalizeSinCos()
2433 Register SrcReg = MI.getOperand(1).getReg(); in legalizeSinCos()
2442 .addUse(MulVal.getReg(0)) in legalizeSinCos()
2443 .setMIFlags(Flags).getReg(0); in legalizeSinCos()
2445 TrigVal = B.buildFMul(Ty, SrcReg, OneOver2Pi, Flags).getReg(0); in legalizeSinCos()
2519 Register DstReg = MI.getOperand(0).getReg(); in legalizeGlobalValue()
2631 Register PtrReg = MI.getOperand(1).getReg(); in legalizeLoad()
2639 MI.getOperand(1).setReg(Cast.getReg(0)); in legalizeLoad()
2647 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoad()
2682 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
2683 B.buildTrunc(ValReg, WideLoad).getReg(0); in legalizeLoad()
2690 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
2695 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
2710 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFMad()
2731 Register DstReg = MI.getOperand(0).getReg(); in legalizeAtomicCmpXChg()
2732 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg()
2733 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg()
2734 Register NewVal = MI.getOperand(3).getReg(); in legalizeAtomicCmpXChg()
2742 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
2756 Register Dst = MI.getOperand(0).getReg(); in legalizeFlog()
2757 Register Src = MI.getOperand(1).getReg(); in legalizeFlog()
2771 Register Dst = MI.getOperand(0).getReg(); in legalizeFExp()
2772 Register Src = MI.getOperand(1).getReg(); in legalizeFExp()
2785 Register Dst = MI.getOperand(0).getReg(); in legalizeFPow()
2786 Register Src0 = MI.getOperand(1).getReg(); in legalizeFPow()
2787 Register Src1 = MI.getOperand(2).getReg(); in legalizeFPow()
2796 .addUse(Log.getReg(0)) in legalizeFPow()
2806 .addUse(Ext0.getReg(0)) in legalizeFPow()
2807 .addUse(Ext1.getReg(0)) in legalizeFPow()
2822 ModSrc = SrcFNeg->getOperand(1).getReg(); in stripAnySourceMods()
2824 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
2826 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
2836 Register Dst = MI.getOperand(0).getReg(); in legalizeFFloor()
2837 Register OrigSrc = MI.getOperand(1).getReg(); in legalizeFFloor()
2876 CorrectedFract = B.buildSelect(S64, IsNan, ModSrc, Min, Flags).getReg(0); in legalizeFFloor()
2890 Register Dst = MI.getOperand(0).getReg(); in legalizeBuildVector()
2894 Register Src0 = MI.getOperand(1).getReg(); in legalizeBuildVector()
2895 Register Src1 = MI.getOperand(2).getReg(); in legalizeBuildVector()
2933 Zero32 = B.buildConstant(S32, 0).getReg(0); in buildMultiply()
2938 Zero64 = B.buildConstant(S64, 0).getReg(0); in buildMultiply()
2955 LocalAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
2961 CarryAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
2965 .getReg(0); in buildMultiply()
2976 LocalAccum = Add.getReg(0); in buildMultiply()
2977 return HaveCarryOut ? Add.getReg(1) : Register(); in buildMultiply()
3007 LocalAccum[0] = Mul.getReg(0); in buildMultiply()
3010 LocalAccum[0] = B.buildAdd(S32, LocalAccum[0], Mul).getReg(0); in buildMultiply()
3014 .getReg(0); in buildMultiply()
3029 Tmp = B.buildAnyExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
3032 Tmp = B.buildMerge(S64, LocalAccum).getReg(0); in buildMultiply()
3035 Tmp = B.buildZExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
3048 Tmp = Mad.getReg(0); in buildMultiply()
3050 CarryOut.push_back(Mad.getReg(1)); in buildMultiply()
3056 LocalAccum[0] = Unmerge.getReg(0); in buildMultiply()
3058 LocalAccum[1] = Unmerge.getReg(1); in buildMultiply()
3120 Accum[2 * i - 1] = Lo->getOperand(0).getReg(); in buildMultiply()
3124 Lo->getOperand(1).getReg()); in buildMultiply()
3125 Accum[2 * i] = Hi.getReg(0); in buildMultiply()
3126 SeparateOddCarry = Hi.getReg(1); in buildMultiply()
3156 Register DstReg = MI.getOperand(0).getReg(); in legalizeMul()
3157 Register Src0 = MI.getOperand(1).getReg(); in legalizeMul()
3158 Register Src1 = MI.getOperand(2).getReg(); in legalizeMul()
3203 Register Dst = MI.getOperand(0).getReg(); in legalizeCTLZ_CTTZ()
3204 Register Src = MI.getOperand(1).getReg(); in legalizeCTLZ_CTTZ()
3222 auto ConstVal = getIConstantVRegSExtVal(MI.getOperand(2).getReg(), MRI); in isNot()
3230 Register CondDef = MI.getOperand(0).getReg(); in verifyCFIntrinsic()
3238 Register NegatedCond = UseMI->getOperand(0).getReg(); in verifyCFIntrinsic()
3291 AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0); in loadInputValue()
3333 if (!loadInputValue(MI.getOperand(0).getReg(), B, ArgType)) in legalizePreloadedArgIntrin()
3342 B.buildConstant(MI.getOperand(0).getReg(), C); in replaceWithConstant()
3360 Register DstReg = MI.getOperand(0).getReg(); in legalizeWorkitemIDIntrinsic()
3400 return B.buildPtrAdd(PtrTy, KernArgReg, COffset).getReg(0); in getKernargParameterPtr()
3409 Register DstReg = MI.getOperand(0).getReg(); in legalizeKernargMemParameter()
3426 Register Dst = MI.getOperand(0).getReg(); in legalizeFDIV()
3503 auto CvtLo = B.buildUITOFP(S32, Unmerge.getReg(0)); in emitReciprocalU64()
3504 auto CvtHi = B.buildUITOFP(S32, Unmerge.getReg(1)); in emitReciprocalU64()
3525 return {ResultLo.getReg(0), ResultHi.getReg(0)}; in emitReciprocalU64()
3549 Register MulHi1_Lo = UnmergeMulHi1.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3550 Register MulHi1_Hi = UnmergeMulHi1.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3553 auto Add1_Hi = B.buildUAdde(S32, S1, RcpHi, MulHi1_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3559 Register MulHi2_Lo = UnmergeMulHi2.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3560 Register MulHi2_Hi = UnmergeMulHi2.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3564 auto Add2_Hi = B.buildUAdde(S32, S1, Add1_Hi, MulHi2_Hi, Add2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3568 Register NumerLo = UnmergeNumer.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3569 Register NumerHi = UnmergeNumer.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3574 Register Mul3_Lo = UnmergeMul3.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3575 Register Mul3_Hi = UnmergeMul3.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3577 auto Sub1_Hi = B.buildUSube(S32, S1, NumerHi, Mul3_Hi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3582 Register DenomLo = UnmergeDenom.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3583 Register DenomHi = UnmergeDenom.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3600 auto Sub2_Mi = B.buildUSube(S32, S1, Sub1_Mi, DenomHi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3601 auto Sub2_Hi = B.buildUSube(S32, S1, Sub2_Mi, Zero32, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3618 auto Sub3_Mi = B.buildUSube(S32, S1, Sub2_Mi, DenomHi, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3619 auto Sub3_Hi = B.buildUSube(S32, S1, Sub3_Mi, Zero32, Sub3_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3648 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3652 DstRemReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3656 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3657 DstRemReg = MI.getOperand(1).getReg(); in legalizeUnsignedDIV_REM()
3665 Register Num = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeUnsignedDIV_REM()
3666 Register Den = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeUnsignedDIV_REM()
3667 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeUnsignedDIV_REM()
3686 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeSignedDIV_REM()
3691 Register LHS = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeSignedDIV_REM()
3692 Register RHS = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeSignedDIV_REM()
3698 LHS = B.buildAdd(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
3699 RHS = B.buildAdd(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
3701 LHS = B.buildXor(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
3702 RHS = B.buildXor(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
3709 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3714 DstRemReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3719 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3720 DstRemReg = MI.getOperand(1).getReg(); in legalizeSignedDIV_REM()
3733 auto Sign = B.buildXor(Ty, LHSign, RHSign).getReg(0); in legalizeSignedDIV_REM()
3734 auto SignXor = B.buildXor(Ty, TmpDivReg, Sign).getReg(0); in legalizeSignedDIV_REM()
3739 auto Sign = LHSign.getReg(0); // Remainder sign is the same as LHS in legalizeSignedDIV_REM()
3740 auto SignXor = B.buildXor(Ty, TmpRemReg, Sign).getReg(0); in legalizeSignedDIV_REM()
3751 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV()
3752 Register LHS = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV()
3753 Register RHS = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV()
3779 .addUse(FNeg.getReg(0)) in legalizeFastUnsafeFDIV()
3800 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV64()
3801 Register X = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV64()
3802 Register Y = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV64()
3840 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV16()
3841 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV16()
3842 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV16()
3853 .addUse(RHSExt.getReg(0)) in legalizeFDIV16()
3860 .addUse(RDst.getReg(0)) in legalizeFDIV16()
3905 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV32()
3906 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV32()
3907 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV32()
3932 .addUse(DenominatorScaled.getReg(0)) in legalizeFDIV32()
3952 .addUse(Fma4.getReg(0)) in legalizeFDIV32()
3953 .addUse(Fma1.getReg(0)) in legalizeFDIV32()
3954 .addUse(Fma3.getReg(0)) in legalizeFDIV32()
3955 .addUse(NumeratorScaled.getReg(1)) in legalizeFDIV32()
3959 .addUse(Fmas.getReg(0)) in legalizeFDIV32()
3974 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV64()
3975 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV64()
3976 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV64()
3991 auto NegDivScale0 = B.buildFNeg(S64, DivScale0.getReg(0), Flags); in legalizeFDIV64()
3994 .addUse(DivScale0.getReg(0)) in legalizeFDIV64()
4008 auto Mul = B.buildFMul(S64, DivScale1.getReg(0), Fma3, Flags); in legalizeFDIV64()
4009 auto Fma4 = B.buildFMA(S64, NegDivScale0, Mul, DivScale1.getReg(0), Flags); in legalizeFDIV64()
4023 auto CmpNum = B.buildICmp(ICmpInst::ICMP_EQ, S1, NumUnmerge.getReg(1), in legalizeFDIV64()
4024 Scale1Unmerge.getReg(1)); in legalizeFDIV64()
4025 auto CmpDen = B.buildICmp(ICmpInst::ICMP_EQ, S1, DenUnmerge.getReg(1), in legalizeFDIV64()
4026 Scale0Unmerge.getReg(1)); in legalizeFDIV64()
4027 Scale = B.buildXor(S1, CmpNum, CmpDen).getReg(0); in legalizeFDIV64()
4029 Scale = DivScale1.getReg(1); in legalizeFDIV64()
4033 .addUse(Fma4.getReg(0)) in legalizeFDIV64()
4034 .addUse(Fma3.getReg(0)) in legalizeFDIV64()
4035 .addUse(Mul.getReg(0)) in legalizeFDIV64()
4040 .addUse(Fmas.getReg(0)) in legalizeFDIV64()
4052 Register Res = MI.getOperand(0).getReg(); in legalizeFDIVFastIntrin()
4053 Register LHS = MI.getOperand(2).getReg(); in legalizeFDIVFastIntrin()
4054 Register RHS = MI.getOperand(3).getReg(); in legalizeFDIVFastIntrin()
4073 .addUse(Mul0.getReg(0)) in legalizeFDIVFastIntrin()
4096 Register Dst = MI.getOperand(0).getReg(); in legalizeRsqClampIntrinsic()
4097 Register Src = MI.getOperand(2).getReg(); in legalizeRsqClampIntrinsic()
4179 B.buildPtrAdd(DstReg, KernargPtrReg, B.buildConstant(IdxTy, Offset).getReg(0)); in getImplicitArgPtr()
4192 Register DstReg = MI.getOperand(0).getReg(); in legalizeImplicitArgPtr()
4221 Register DstReg = MI.getOperand(0).getReg(); in legalizeLDSKernelId()
4234 auto Unmerge = B.buildUnmerge(LLT::scalar(32), MI.getOperand(2).getReg()); in legalizeIsAddrSpace()
4235 Register Hi32 = Unmerge.getReg(1); in legalizeIsAddrSpace()
4262 BaseReg = B.buildPtrToInt(MRI.getType(OrigOffset), BaseReg).getReg(0); in splitBufferOffsets()
4280 BaseReg = B.buildConstant(S32, Overflow).getReg(0); in splitBufferOffsets()
4283 BaseReg = B.buildAdd(S32, BaseReg, OverflowVal).getReg(0); in splitBufferOffsets()
4288 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
4333 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
4338 .getReg(0); in handleD16VData()
4344 Reg = B.buildBitcast(S32, Reg).getReg(0); in handleD16VData()
4346 PackedRegs.resize(2, B.buildUndef(S32).getReg(0)); in handleD16VData()
4348 .getReg(0); in handleD16VData()
4355 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
4356 PackedRegs.resize(6, B.buildUndef(S16).getReg(0)); in handleD16VData()
4357 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
4358 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
4363 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
4366 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
4367 PackedRegs.resize(4, B.buildUndef(S32).getReg(0)); in handleD16VData()
4369 .getReg(0); in handleD16VData()
4377 .getReg(0); in handleD16VData()
4391 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
4410 Register VData = MI.getOperand(1).getReg(); in legalizeBufferStore()
4417 Register RSrc = MI.getOperand(2).getReg(); in legalizeBufferStore()
4432 VIndex = MI.getOperand(3).getReg(); in legalizeBufferStore()
4435 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferStore()
4438 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferStore()
4439 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferStore()
4502 Register Dst = MI.getOperand(0).getReg(); in legalizeBufferLoad()
4503 Register RSrc = MI.getOperand(2).getReg(); in legalizeBufferLoad()
4513 VIndex = MI.getOperand(3).getReg(); in legalizeBufferLoad()
4516 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferLoad()
4519 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad()
4520 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferLoad()
4601 Repack.push_back(B.buildTrunc(EltTy, Unmerge.getReg(I)).getReg(0)); in legalizeBufferLoad()
4616 .addDef(MI.getOperand(0).getReg()) in legalizeAtomicIncDec()
4617 .addUse(MI.getOperand(2).getReg()) in legalizeAtomicIncDec()
4618 .addUse(MI.getOperand(3).getReg()) in legalizeAtomicIncDec()
4691 Dst = MI.getOperand(0).getReg(); in legalizeBufferAtomic()
4696 Register VData = MI.getOperand(2 + OpOffset).getReg(); in legalizeBufferAtomic()
4700 CmpVal = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
4704 Register RSrc = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
4711 VIndex = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
4714 VIndex = B.buildConstant(LLT::scalar(32), 0).getReg(0); in legalizeBufferAtomic()
4717 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
4718 Register SOffset = MI.getOperand(5 + OpOffset).getReg(); in legalizeBufferAtomic()
4766 Register AddrReg = SrcOp.getReg(); in packImage16bitOpsToDwords()
4777 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
4778 .getReg(0)); in packImage16bitOpsToDwords()
4783 AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0); in packImage16bitOpsToDwords()
4798 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
4799 .getReg(0)); in packImage16bitOpsToDwords()
4803 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords()
4804 .getReg(0)); in packImage16bitOpsToDwords()
4821 AddrRegs.push_back(SrcOp.getReg()); in convertImageAddrToPacked()
4822 assert(B.getMRI()->getType(SrcOp.getReg()) == S32); in convertImageAddrToPacked()
4832 AddrRegs.append(RoundedNumRegs - NumAddrRegs, Undef.getReg(0)); in convertImageAddrToPacked()
4838 MI.getOperand(DimIdx).setReg(VAddr.getReg(0)); in convertImageAddrToPacked()
4881 Register VData = MI.getOperand(NumDefs == 0 ? 1 : 0).getReg(); in legalizeImageIntrinsic()
4886 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg()); in legalizeImageIntrinsic()
4888 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg()); in legalizeImageIntrinsic()
4929 Register VData0 = MI.getOperand(2).getReg(); in legalizeImageIntrinsic()
4937 Register VData1 = MI.getOperand(3).getReg(); in legalizeImageIntrinsic()
4941 MI.getOperand(2).setReg(Concat.getReg(0)); in legalizeImageIntrinsic()
4974 PackedRegs[0] = Concat.getReg(0); in legalizeImageIntrinsic()
4986 assert(SrcOp.getReg() != AMDGPU::NoRegister); in legalizeImageIntrinsic()
5038 Register DstReg = MI.getOperand(0).getReg(); in legalizeImageIntrinsic()
5104 Dst1Reg = MI.getOperand(1).getReg(); in legalizeImageIntrinsic()
5162 Reg = B.buildBitcast(V2S16, Reg).getReg(0); in legalizeImageIntrinsic()
5165 Reg = B.buildTrunc(S16, Reg).getReg(0); in legalizeImageIntrinsic()
5172 Register Undef = B.buildUndef(Ty).getReg(0); in legalizeImageIntrinsic()
5196 NewResultReg = B.buildConcatVectors(V4S16, ResultRegs).getReg(0); in legalizeImageIntrinsic()
5221 Register Dst = MI.getOperand(0).getReg(); in legalizeSBufferLoad()
5231 Dst = MI.getOperand(0).getReg(); in legalizeSBufferLoad()
5329 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in legalizeTrapHsaQueuePtr()
5331 Register Temp = B.buildLoad(S64, LoadAddr, *MMO).getReg(0); in legalizeTrapHsaQueuePtr()
5393 Register DstReg = MI.getOperand(0).getReg(); in legalizeBVHIntrinsic()
5394 Register NodePtr = MI.getOperand(2).getReg(); in legalizeBVHIntrinsic()
5395 Register RayExtent = MI.getOperand(3).getReg(); in legalizeBVHIntrinsic()
5396 Register RayOrigin = MI.getOperand(4).getReg(); in legalizeBVHIntrinsic()
5397 Register RayDir = MI.getOperand(5).getReg(); in legalizeBVHIntrinsic()
5398 Register RayInvDir = MI.getOperand(6).getReg(); in legalizeBVHIntrinsic()
5399 Register TDescr = MI.getOperand(7).getReg(); in legalizeBVHIntrinsic()
5439 V3S32, {Unmerge.getReg(0), Unmerge.getReg(1), Unmerge.getReg(2)}); in legalizeBVHIntrinsic()
5440 Ops.push_back(Merged.getReg(0)); in legalizeBVHIntrinsic()
5452 {B.buildBitcast(S32, B.buildMerge(V2S16, {UnmergeRayInvDir.getReg(0), in legalizeBVHIntrinsic()
5453 UnmergeRayDir.getReg(0)})) in legalizeBVHIntrinsic()
5454 .getReg(0), in legalizeBVHIntrinsic()
5455 B.buildBitcast(S32, B.buildMerge(V2S16, {UnmergeRayInvDir.getReg(1), in legalizeBVHIntrinsic()
5456 UnmergeRayDir.getReg(1)})) in legalizeBVHIntrinsic()
5457 .getReg(0), in legalizeBVHIntrinsic()
5458 B.buildBitcast(S32, B.buildMerge(V2S16, {UnmergeRayInvDir.getReg(2), in legalizeBVHIntrinsic()
5459 UnmergeRayDir.getReg(2)})) in legalizeBVHIntrinsic()
5460 .getReg(0)}); in legalizeBVHIntrinsic()
5461 Ops.push_back(MergedDir.getReg(0)); in legalizeBVHIntrinsic()
5469 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
5470 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
5478 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
5479 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
5480 Ops.push_back(Unmerge.getReg(2)); in legalizeBVHIntrinsic()
5490 B.buildMerge(R1, {UnmergeRayDir.getReg(0), UnmergeRayDir.getReg(1)}); in legalizeBVHIntrinsic()
5491 B.buildMerge(R2, {UnmergeRayDir.getReg(2), UnmergeRayInvDir.getReg(0)}); in legalizeBVHIntrinsic()
5493 {UnmergeRayInvDir.getReg(1), UnmergeRayInvDir.getReg(2)}); in legalizeBVHIntrinsic()
5506 Register MergedOps = B.buildMerge(OpTy, Ops).getReg(0); in legalizeBVHIntrinsic()
5540 .addDef(MI.getOperand(0).getReg()) in legalizeFPTruncRound()
5541 .addUse(MI.getOperand(1).getReg()); in legalizeFPTruncRound()
5566 Register Def = MI.getOperand(1).getReg(); in legalizeIntrinsic()
5567 Register Use = MI.getOperand(3).getReg(); in legalizeIntrinsic()
5615 Register Reg = MI.getOperand(2).getReg(); in legalizeIntrinsic()
5641 B.buildConstant(MI.getOperand(0).getReg(), 0); in legalizeIntrinsic()
5772 Register DstReg = MI.getOperand(0).getReg(); in legalizeIntrinsic()