Lines Matching refs:S32
438 const LLT S32 = LLT::scalar(32); in AMDGPULegalizerInfo() local
500 S32, S64 in AMDGPULegalizerInfo()
504 S32, S64, S16 in AMDGPULegalizerInfo()
508 S32, S64, S16, V2S16 in AMDGPULegalizerInfo()
511 const LLT MinScalarFPTy = ST.has16BitInsts() ? S16 : S32; in AMDGPULegalizerInfo()
514 getActionDefinitionsBuilder(G_BRCOND).legalFor({S1, S32}); in AMDGPULegalizerInfo()
519 .legalFor({S32, S64, V2S16, S16, V4S16, S1, S128, S256}) in AMDGPULegalizerInfo()
527 .clampMaxNumElements(0, S32, 16) in AMDGPULegalizerInfo()
534 .legalFor({S32, S16, V2S16}) in AMDGPULegalizerInfo()
539 .maxScalar(0, S32); in AMDGPULegalizerInfo()
542 .legalFor({S32, S16, V2S16}) in AMDGPULegalizerInfo()
551 .legalFor({S32, S16, V2S16}) // Clamp modifier in AMDGPULegalizerInfo()
559 .legalFor({S32, S16}) in AMDGPULegalizerInfo()
562 .maxScalar(0, S32) in AMDGPULegalizerInfo()
566 .legalFor({S32, S16}) in AMDGPULegalizerInfo()
576 .legalFor({S32, S16}) // Clamp modifier in AMDGPULegalizerInfo()
590 .legalFor({S32}) in AMDGPULegalizerInfo()
592 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
596 .legalFor({S32}) in AMDGPULegalizerInfo()
598 .minScalar(0, S32) in AMDGPULegalizerInfo()
604 Mul.maxScalar(0, S32); in AMDGPULegalizerInfo()
608 .legalFor({S32}) // Clamp modifier. in AMDGPULegalizerInfo()
610 .minScalarOrElt(0, S32) in AMDGPULegalizerInfo()
615 .minScalar(0, S32) in AMDGPULegalizerInfo()
623 .minScalar(0, S32) in AMDGPULegalizerInfo()
630 .customFor({S32, S64}) in AMDGPULegalizerInfo()
631 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
636 .legalFor({S32}) in AMDGPULegalizerInfo()
637 .maxScalar(0, S32); in AMDGPULegalizerInfo()
652 .legalFor({S32, S1, S64, V2S32, S16, V2S16, V4S16}) in AMDGPULegalizerInfo()
653 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
661 .legalFor({{S32, S1}, {S32, S32}}) in AMDGPULegalizerInfo()
662 .minScalar(0, S32) in AMDGPULegalizerInfo()
673 .legalFor({S1, S32, S64, S16, GlobalPtr, in AMDGPULegalizerInfo()
676 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
680 .legalFor({S32, S64, S16}) in AMDGPULegalizerInfo()
689 .clampScalarOrElt(0, S32, MaxScalar) in AMDGPULegalizerInfo()
691 .clampMaxNumElements(0, S32, 16); in AMDGPULegalizerInfo()
698 .legalFor({{PrivatePtr, S32}}); in AMDGPULegalizerInfo()
707 .legalFor({S32, S64}); in AMDGPULegalizerInfo()
709 .customFor({S32, S64}); in AMDGPULegalizerInfo()
711 .customFor({S32, S64}); in AMDGPULegalizerInfo()
738 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
747 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
751 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
755 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
765 .legalFor({S32, S64, S16}) in AMDGPULegalizerInfo()
770 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
772 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
777 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
779 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
782 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
784 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
789 .legalFor({{S32, S64}, {S16, S32}}) in AMDGPULegalizerInfo()
794 .legalFor({{S64, S32}, {S32, S16}}) in AMDGPULegalizerInfo()
795 .narrowScalarFor({{S64, S16}}, changeTo(0, S32)) in AMDGPULegalizerInfo()
802 .legalFor({S32, S16}) in AMDGPULegalizerInfo()
808 .legalFor({S32}) in AMDGPULegalizerInfo()
815 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
820 FMad.customFor({S32, S16}); in AMDGPULegalizerInfo()
822 FMad.customFor({S32}); in AMDGPULegalizerInfo()
830 FRem.customFor({S16, S32, S64}); in AMDGPULegalizerInfo()
832 FRem.minScalar(0, S32) in AMDGPULegalizerInfo()
833 .customFor({S32, S64}); in AMDGPULegalizerInfo()
849 .legalFor({{S64, S32}, {S32, S16}, {S64, S16}, in AMDGPULegalizerInfo()
850 {S32, S1}, {S64, S1}, {S16, S1}}) in AMDGPULegalizerInfo()
852 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
857 .legalFor({{S32, S32}, {S64, S32}, {S16, S32}}) in AMDGPULegalizerInfo()
859 .customFor({{S32, S64}, {S64, S64}}); in AMDGPULegalizerInfo()
862 IToFP.clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
863 .minScalar(0, S32) in AMDGPULegalizerInfo()
868 .legalFor({{S32, S32}, {S32, S64}, {S32, S16}}) in AMDGPULegalizerInfo()
869 .customFor({{S64, S32}, {S64, S64}}) in AMDGPULegalizerInfo()
870 .narrowScalarFor({{S64, S16}}, changeTo(0, S32)); in AMDGPULegalizerInfo()
874 FPToI.minScalar(1, S32); in AMDGPULegalizerInfo()
876 FPToI.minScalar(0, S32) in AMDGPULegalizerInfo()
882 .customFor({S16, S32}) in AMDGPULegalizerInfo()
893 .legalFor({S16, S32, S64}) in AMDGPULegalizerInfo()
898 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
899 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
903 .legalFor({S32}) in AMDGPULegalizerInfo()
905 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
915 .legalIf(all(sameSize(0, 1), typeInSet(1, {S64, S32}))) in AMDGPULegalizerInfo()
932 {S1}, {S32, S64, GlobalPtr, LocalPtr, ConstantPtr, PrivatePtr, FlatPtr}) in AMDGPULegalizerInfo()
934 {S32}, {S32, S64, GlobalPtr, LocalPtr, ConstantPtr, PrivatePtr, FlatPtr}); in AMDGPULegalizerInfo()
941 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
943 .legalIf(all(typeInSet(0, {S1, S32}), isPointer(1))); in AMDGPULegalizerInfo()
948 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
954 Exp2Ops.legalFor({S32, S16}); in AMDGPULegalizerInfo()
956 Exp2Ops.legalFor({S32}); in AMDGPULegalizerInfo()
957 Exp2Ops.clampScalar(0, MinScalarFPTy, S32); in AMDGPULegalizerInfo()
962 ExpOps.customFor({{S32}, {S16}}); in AMDGPULegalizerInfo()
964 ExpOps.customFor({S32}); in AMDGPULegalizerInfo()
965 ExpOps.clampScalar(0, MinScalarFPTy, S32) in AMDGPULegalizerInfo()
969 .clampScalar(0, MinScalarFPTy, S32) in AMDGPULegalizerInfo()
974 .legalFor({{S32, S32}, {S32, S64}}) in AMDGPULegalizerInfo()
975 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
977 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
987 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
988 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
995 .legalFor({{S32, S32}, {S32, S64}}) in AMDGPULegalizerInfo()
996 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
997 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
1005 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
1006 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
1012 .legalFor({S16, S32, V2S16}) in AMDGPULegalizerInfo()
1017 .clampScalar(0, S16, S32) in AMDGPULegalizerInfo()
1022 .legalFor({S32, S16, V2S16}) in AMDGPULegalizerInfo()
1031 .legalFor({S32, S16}) in AMDGPULegalizerInfo()
1040 .legalFor({S32}) in AMDGPULegalizerInfo()
1045 .maxScalar(0, S32) in AMDGPULegalizerInfo()
1050 .legalFor({S32}) in AMDGPULegalizerInfo()
1051 .minScalar(0, S32) in AMDGPULegalizerInfo()
1060 .legalForCartesianProduct(AddrSpaces32, {S32}) in AMDGPULegalizerInfo()
1076 .legalForCartesianProduct(AddrSpaces32, {S32}) in AMDGPULegalizerInfo()
1138 Actions.legalForTypesWithMemDesc({{S32, GlobalPtr, S32, GlobalAlign32}, in AMDGPULegalizerInfo()
1144 {S32, GlobalPtr, S8, GlobalAlign8}, in AMDGPULegalizerInfo()
1145 {S32, GlobalPtr, S16, GlobalAlign16}, in AMDGPULegalizerInfo()
1147 {S32, LocalPtr, S32, 32}, in AMDGPULegalizerInfo()
1150 {S32, LocalPtr, S8, 8}, in AMDGPULegalizerInfo()
1151 {S32, LocalPtr, S16, 16}, in AMDGPULegalizerInfo()
1152 {V2S16, LocalPtr, S32, 32}, in AMDGPULegalizerInfo()
1154 {S32, PrivatePtr, S32, 32}, in AMDGPULegalizerInfo()
1155 {S32, PrivatePtr, S8, 8}, in AMDGPULegalizerInfo()
1156 {S32, PrivatePtr, S16, 16}, in AMDGPULegalizerInfo()
1157 {V2S16, PrivatePtr, S32, 32}, in AMDGPULegalizerInfo()
1159 {S32, ConstantPtr, S32, GlobalAlign32}, in AMDGPULegalizerInfo()
1284 .minScalar(0, S32) in AMDGPULegalizerInfo()
1285 .narrowScalarIf(isWideScalarExtLoadTruncStore(0), changeTo(0, S32)) in AMDGPULegalizerInfo()
1293 .legalForTypesWithMemDesc({{S32, GlobalPtr, S8, 8}, in AMDGPULegalizerInfo()
1294 {S32, GlobalPtr, S16, 2 * 8}, in AMDGPULegalizerInfo()
1295 {S32, LocalPtr, S8, 8}, in AMDGPULegalizerInfo()
1296 {S32, LocalPtr, S16, 16}, in AMDGPULegalizerInfo()
1297 {S32, PrivatePtr, S8, 8}, in AMDGPULegalizerInfo()
1298 {S32, PrivatePtr, S16, 16}, in AMDGPULegalizerInfo()
1299 {S32, ConstantPtr, S8, 8}, in AMDGPULegalizerInfo()
1300 {S32, ConstantPtr, S16, 2 * 8}}) in AMDGPULegalizerInfo()
1308 {{S32, FlatPtr, S8, 8}, {S32, FlatPtr, S16, 16}}); in AMDGPULegalizerInfo()
1318 ExtLoads.clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
1327 .legalFor({{S32, GlobalPtr}, {S32, LocalPtr}, in AMDGPULegalizerInfo()
1329 {S32, RegionPtr}, {S64, RegionPtr}}); in AMDGPULegalizerInfo()
1331 Atomics.legalFor({{S32, FlatPtr}, {S64, FlatPtr}}); in AMDGPULegalizerInfo()
1336 Atomic.legalFor({{S32, LocalPtr}, {S32, RegionPtr}}); in AMDGPULegalizerInfo()
1343 Atomic.legalFor({{S32, GlobalPtr}}); in AMDGPULegalizerInfo()
1351 {S32, GlobalPtr}, in AMDGPULegalizerInfo()
1360 .customFor({{S32, GlobalPtr}, {S64, GlobalPtr}, in AMDGPULegalizerInfo()
1361 {S32, FlatPtr}, {S64, FlatPtr}}) in AMDGPULegalizerInfo()
1362 .legalFor({{S32, LocalPtr}, {S64, LocalPtr}, in AMDGPULegalizerInfo()
1363 {S32, RegionPtr}, {S64, RegionPtr}}); in AMDGPULegalizerInfo()
1368 .legalForCartesianProduct({S32, S64, S16, V2S32, V2S16, V4S16, GlobalPtr, in AMDGPULegalizerInfo()
1372 {S1, S32}) in AMDGPULegalizerInfo()
1377 .clampMaxNumElements(0, S32, 2) in AMDGPULegalizerInfo()
1382 .legalIf(all(isPointer(0), typeInSet(1, {S1, S32}))); in AMDGPULegalizerInfo()
1387 .legalFor({{S32, S32}, {S64, S32}}); in AMDGPULegalizerInfo()
1406 Shifts.clampScalar(1, S32, S32); in AMDGPULegalizerInfo()
1418 Shifts.clampScalar(1, S32, S32); in AMDGPULegalizerInfo()
1420 Shifts.clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
1423 .minScalar(0, S32) in AMDGPULegalizerInfo()
1464 .clampScalar(EltTypeIdx, S32, S64) in AMDGPULegalizerInfo()
1465 .clampScalar(VecTypeIdx, S32, S64) in AMDGPULegalizerInfo()
1466 .clampScalar(IdxTypeIdx, S32, S32) in AMDGPULegalizerInfo()
1467 .clampMaxNumElements(VecTypeIdx, S32, 32) in AMDGPULegalizerInfo()
1519 .legalForCartesianProduct(AllS32Vectors, {S32}) in AMDGPULegalizerInfo()
1530 .minScalar(1, S32); in AMDGPULegalizerInfo()
1533 .legalFor({V2S16, S32}) in AMDGPULegalizerInfo()
1535 BuildVector.minScalarOrElt(0, S32); in AMDGPULegalizerInfo()
1538 BuildVector.minScalarOrElt(0, S32); in AMDGPULegalizerInfo()
1541 .customFor({V2S16, S32}) in AMDGPULegalizerInfo()
1550 .clampMaxNumElements(0, S32, 32) in AMDGPULegalizerInfo()
1598 .clampScalar(LitTyIdx, S32, S512) in AMDGPULegalizerInfo()
1607 .clampScalar(BigTyIdx, S32, MaxScalar); in AMDGPULegalizerInfo()
1616 changeTo(LitTyIdx, S32)); in AMDGPULegalizerInfo()
1645 .legalFor({{S32}, {S64}}); in AMDGPULegalizerInfo()
1654 SextInReg.lowerFor({{S32}, {S64}, {S16}}); in AMDGPULegalizerInfo()
1658 SextInReg.lowerFor({{S32}, {S64}}); in AMDGPULegalizerInfo()
1663 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
1672 .legalFor({{S32, S32}}) in AMDGPULegalizerInfo()
1698 .minScalar(0, S32) in AMDGPULegalizerInfo()
1702 .legalFor({{S32, S32}, {S64, S32}}) in AMDGPULegalizerInfo()
1703 .clampScalar(1, S32, S32) in AMDGPULegalizerInfo()
1704 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
1825 const LLT S32 = LLT::scalar(32); in getSegmentAperture() local
1848 MRI.setType(GetReg, S32); in getSegmentAperture()
1850 auto ShiftAmt = B.buildConstant(S32, WidthM1 + 1); in getSegmentAperture()
1851 return B.buildShl(S32, GetReg, ShiftAmt).getReg(0); in getSegmentAperture()
1884 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
1905 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
1934 const LLT S32 = LLT::scalar(32); in legalizeAddrSpaceCast() local
1992 Register SrcAsInt = B.buildPtrToInt(S32, Src).getReg(0); in legalizeAddrSpaceCast()
2125 LLT S32 = LLT::scalar(32); in extractF64Exponent() local
2127 auto Const0 = B.buildConstant(S32, FractBits - 32); in extractF64Exponent()
2128 auto Const1 = B.buildConstant(S32, ExpBits); in extractF64Exponent()
2130 auto ExpPart = B.buildIntrinsic(Intrinsic::amdgcn_ubfe, {S32}, false) in extractF64Exponent()
2135 return B.buildSub(S32, ExpPart, B.buildConstant(S32, 1023)); in extractF64Exponent()
2142 const LLT S32 = LLT::scalar(32); in legalizeIntrinsicTrunc() local
2149 auto Unmerge = B.buildUnmerge({S32, S32}, Src); in legalizeIntrinsicTrunc()
2159 const auto SignBitMask = B.buildConstant(S32, UINT32_C(1) << 31); in legalizeIntrinsicTrunc()
2160 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc()
2164 const auto Zero32 = B.buildConstant(S32, 0); in legalizeIntrinsicTrunc()
2172 auto FiftyOne = B.buildConstant(S32, FractBits - 1); in legalizeIntrinsicTrunc()
2191 const LLT S32 = LLT::scalar(32); in legalizeITOFP() local
2195 auto Unmerge = B.buildUnmerge({S32, S32}, Src); in legalizeITOFP()
2196 auto ThirtyTwo = B.buildConstant(S32, 32); in legalizeITOFP()
2213 assert(MRI.getType(Dst) == S32); in legalizeITOFP()
2215 auto One = B.buildConstant(S32, 1); in legalizeITOFP()
2219 auto ThirtyOne = B.buildConstant(S32, 31); in legalizeITOFP()
2220 auto X = B.buildXor(S32, Unmerge.getReg(0), Unmerge.getReg(1)); in legalizeITOFP()
2221 auto OppositeSign = B.buildAShr(S32, X, ThirtyOne); in legalizeITOFP()
2222 auto MaxShAmt = B.buildAdd(S32, ThirtyTwo, OppositeSign); in legalizeITOFP()
2223 auto LS = B.buildIntrinsic(Intrinsic::amdgcn_sffbh, {S32}, in legalizeITOFP()
2226 auto LS2 = B.buildSub(S32, LS, One); in legalizeITOFP()
2227 ShAmt = B.buildUMin(S32, LS2, MaxShAmt); in legalizeITOFP()
2229 ShAmt = B.buildCTLZ(S32, Unmerge.getReg(1)); in legalizeITOFP()
2231 auto Unmerge2 = B.buildUnmerge({S32, S32}, Norm); in legalizeITOFP()
2232 auto Adjust = B.buildUMin(S32, One, Unmerge2.getReg(0)); in legalizeITOFP()
2233 auto Norm2 = B.buildOr(S32, Unmerge2.getReg(1), Adjust); in legalizeITOFP()
2234 auto FVal = Signed ? B.buildSITOFP(S32, Norm2) : B.buildUITOFP(S32, Norm2); in legalizeITOFP()
2235 auto Scale = B.buildSub(S32, ThirtyTwo, ShAmt); in legalizeITOFP()
2255 const LLT S32 = LLT::scalar(32); in legalizeFPTOI() local
2258 assert((SrcLT == S32 || SrcLT == S64) && MRI.getType(Dst) == S64); in legalizeFPTOI()
2273 if (Signed && SrcLT == S32) { in legalizeFPTOI()
2279 Sign = B.buildAShr(S32, Src, B.buildConstant(S32, 31)); in legalizeFPTOI()
2280 Trunc = B.buildFAbs(S32, Trunc, Flags); in legalizeFPTOI()
2289 K0 = B.buildFConstant(S32, BitsToFloat(UINT32_C(/*2^-32*/ 0x2f800000))); in legalizeFPTOI()
2290 K1 = B.buildFConstant(S32, BitsToFloat(UINT32_C(/*-2^32*/ 0xcf800000))); in legalizeFPTOI()
2297 auto Hi = (Signed && SrcLT == S64) ? B.buildFPTOSI(S32, FloorMul) in legalizeFPTOI()
2298 : B.buildFPTOUI(S32, FloorMul); in legalizeFPTOI()
2299 auto Lo = B.buildFPTOUI(S32, Fma); in legalizeFPTOI()
2301 if (Signed && SrcLT == S32) { in legalizeFPTOI()
2566 LLT S32 = LLT::scalar(32); in legalizeGlobalValue() local
2568 B.buildIntrinsic(Intrinsic::amdgcn_groupstaticsize, {S32}, false); in legalizeGlobalValue()
2791 const LLT S32 = LLT::scalar(32); in legalizeFPow() local
2793 if (Ty == S32) { in legalizeFPow()
2794 auto Log = B.buildFLog2(S32, Src0, Flags); in legalizeFPow()
2795 auto Mul = B.buildIntrinsic(Intrinsic::amdgcn_fmul_legacy, {S32}, false) in legalizeFPow()
2803 auto Ext0 = B.buildFPExt(S32, Log, Flags); in legalizeFPow()
2804 auto Ext1 = B.buildFPExt(S32, Src1, Flags); in legalizeFPow()
2805 auto Mul = B.buildIntrinsic(Intrinsic::amdgcn_fmul_legacy, {S32}, false) in legalizeFPow()
2891 const LLT S32 = LLT::scalar(32); in legalizeBuildVector() local
2898 auto Merge = B.buildMerge(S32, {Src0, Src1}); in legalizeBuildVector()
2925 const LLT S32 = LLT::scalar(32); in buildMultiply() local
2933 Zero32 = B.buildConstant(S32, 0).getReg(0); in buildMultiply()
2955 LocalAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
2961 CarryAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
2964 B.buildUAdde(S32, S1, CarryAccum, getZero32(), CarryIn[i]) in buildMultiply()
2975 B.buildUAdde(S32, S1, CarryAccum, LocalAccum, CarryIn.back()); in buildMultiply()
3005 auto Mul = B.buildMul(S32, Src0[j0], Src1[j1]); in buildMultiply()
3010 LocalAccum[0] = B.buildAdd(S32, LocalAccum[0], Mul).getReg(0); in buildMultiply()
3013 B.buildUAdde(S32, S1, LocalAccum[0], Mul, CarryIn.back()) in buildMultiply()
3055 auto Unmerge = B.buildUnmerge(S32, Tmp); in buildMultiply()
3113 Lo = B.buildUAddo(S32, S1, Accum[2 * i - 1], SeparateOddOut[0]); in buildMultiply()
3115 Lo = B.buildAdd(S32, Accum[2 * i - 1], SeparateOddOut[0]); in buildMultiply()
3117 Lo = B.buildUAdde(S32, S1, Accum[2 * i - 1], SeparateOddOut[0], in buildMultiply()
3123 auto Hi = B.buildUAdde(S32, S1, Accum[2 * i], SeparateOddOut[1], in buildMultiply()
3178 LLT S32 = LLT::scalar(32); in legalizeMul() local
3181 Src0Parts.push_back(MRI.createGenericVirtualRegister(S32)); in legalizeMul()
3182 Src1Parts.push_back(MRI.createGenericVirtualRegister(S32)); in legalizeMul()
3281 const LLT S32 = LLT::scalar(32); in loadInputValue() local
3290 auto ShiftAmt = B.buildConstant(S32, Shift); in loadInputValue()
3291 AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0); in loadInputValue()
3294 B.buildAnd(DstReg, AndMaskSrc, B.buildConstant(S32, Mask >> Shift)); in loadInputValue()
3429 LLT S32 = LLT::scalar(32); in legalizeFDIV() local
3434 if (DstTy == S32) in legalizeFDIV()
3448 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM32Impl() local
3454 auto FloatY = B.buildUITOFP(S32, Y); in legalizeUnsignedDIV_REM32Impl()
3455 auto RcpIFlag = B.buildInstr(AMDGPU::G_AMDGPU_RCP_IFLAG, {S32}, {FloatY}); in legalizeUnsignedDIV_REM32Impl()
3456 auto Scale = B.buildFConstant(S32, BitsToFloat(0x4f7ffffe)); in legalizeUnsignedDIV_REM32Impl()
3457 auto ScaledY = B.buildFMul(S32, RcpIFlag, Scale); in legalizeUnsignedDIV_REM32Impl()
3458 auto Z = B.buildFPTOUI(S32, ScaledY); in legalizeUnsignedDIV_REM32Impl()
3461 auto NegY = B.buildSub(S32, B.buildConstant(S32, 0), Y); in legalizeUnsignedDIV_REM32Impl()
3462 auto NegYZ = B.buildMul(S32, NegY, Z); in legalizeUnsignedDIV_REM32Impl()
3463 Z = B.buildAdd(S32, Z, B.buildUMulH(S32, Z, NegYZ)); in legalizeUnsignedDIV_REM32Impl()
3466 auto Q = B.buildUMulH(S32, X, Z); in legalizeUnsignedDIV_REM32Impl()
3467 auto R = B.buildSub(S32, X, B.buildMul(S32, Q, Y)); in legalizeUnsignedDIV_REM32Impl()
3470 auto One = B.buildConstant(S32, 1); in legalizeUnsignedDIV_REM32Impl()
3473 Q = B.buildSelect(S32, Cond, B.buildAdd(S32, Q, One), Q); in legalizeUnsignedDIV_REM32Impl()
3474 R = B.buildSelect(S32, Cond, B.buildSub(S32, R, Y), R); in legalizeUnsignedDIV_REM32Impl()
3479 B.buildSelect(DstDivReg, Cond, B.buildAdd(S32, Q, One), Q); in legalizeUnsignedDIV_REM32Impl()
3482 B.buildSelect(DstRemReg, Cond, B.buildSub(S32, R, Y), R); in legalizeUnsignedDIV_REM32Impl()
3500 const LLT S32 = LLT::scalar(32); in emitReciprocalU64() local
3501 auto Unmerge = B.buildUnmerge(S32, Val); in emitReciprocalU64()
3503 auto CvtLo = B.buildUITOFP(S32, Unmerge.getReg(0)); in emitReciprocalU64()
3504 auto CvtHi = B.buildUITOFP(S32, Unmerge.getReg(1)); in emitReciprocalU64()
3506 auto Mad = B.buildFMAD(S32, CvtHi, // 2**32 in emitReciprocalU64()
3507 B.buildFConstant(S32, BitsToFloat(0x4f800000)), CvtLo); in emitReciprocalU64()
3509 auto Rcp = B.buildInstr(AMDGPU::G_AMDGPU_RCP_IFLAG, {S32}, {Mad}); in emitReciprocalU64()
3511 B.buildFMul(S32, Rcp, B.buildFConstant(S32, BitsToFloat(0x5f7ffffc))); in emitReciprocalU64()
3515 B.buildFMul(S32, Mul1, B.buildFConstant(S32, BitsToFloat(0x2f800000))); in emitReciprocalU64()
3516 auto Trunc = B.buildIntrinsicTrunc(S32, Mul2); in emitReciprocalU64()
3519 auto Mad2 = B.buildFMAD(S32, Trunc, in emitReciprocalU64()
3520 B.buildFConstant(S32, BitsToFloat(0xcf800000)), Mul1); in emitReciprocalU64()
3522 auto ResultLo = B.buildFPTOUI(S32, Mad2); in emitReciprocalU64()
3523 auto ResultHi = B.buildFPTOUI(S32, Trunc); in emitReciprocalU64()
3533 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM64Impl() local
3548 auto UnmergeMulHi1 = B.buildUnmerge(S32, MulHi1); in legalizeUnsignedDIV_REM64Impl()
3552 auto Add1_Lo = B.buildUAddo(S32, S1, RcpLo, MulHi1_Lo); in legalizeUnsignedDIV_REM64Impl()
3553 auto Add1_Hi = B.buildUAdde(S32, S1, RcpHi, MulHi1_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3558 auto UnmergeMulHi2 = B.buildUnmerge(S32, MulHi2); in legalizeUnsignedDIV_REM64Impl()
3562 auto Zero32 = B.buildConstant(S32, 0); in legalizeUnsignedDIV_REM64Impl()
3563 auto Add2_Lo = B.buildUAddo(S32, S1, Add1_Lo, MulHi2_Lo); in legalizeUnsignedDIV_REM64Impl()
3564 auto Add2_Hi = B.buildUAdde(S32, S1, Add1_Hi, MulHi2_Hi, Add2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3567 auto UnmergeNumer = B.buildUnmerge(S32, Numer); in legalizeUnsignedDIV_REM64Impl()
3573 auto UnmergeMul3 = B.buildUnmerge(S32, Mul3); in legalizeUnsignedDIV_REM64Impl()
3576 auto Sub1_Lo = B.buildUSubo(S32, S1, NumerLo, Mul3_Lo); in legalizeUnsignedDIV_REM64Impl()
3577 auto Sub1_Hi = B.buildUSube(S32, S1, NumerHi, Mul3_Hi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3578 auto Sub1_Mi = B.buildSub(S32, NumerHi, Mul3_Hi); in legalizeUnsignedDIV_REM64Impl()
3581 auto UnmergeDenom = B.buildUnmerge(S32, Denom); in legalizeUnsignedDIV_REM64Impl()
3586 auto C1 = B.buildSExt(S32, CmpHi); in legalizeUnsignedDIV_REM64Impl()
3589 auto C2 = B.buildSExt(S32, CmpLo); in legalizeUnsignedDIV_REM64Impl()
3592 auto C3 = B.buildSelect(S32, CmpEq, C2, C1); in legalizeUnsignedDIV_REM64Impl()
3599 auto Sub2_Lo = B.buildUSubo(S32, S1, Sub1_Lo, DenomLo); in legalizeUnsignedDIV_REM64Impl()
3600 auto Sub2_Mi = B.buildUSube(S32, S1, Sub1_Mi, DenomHi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3601 auto Sub2_Hi = B.buildUSube(S32, S1, Sub2_Mi, Zero32, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3608 B.buildSExt(S32, B.buildICmp(CmpInst::ICMP_UGE, S1, Sub2_Hi, DenomHi)); in legalizeUnsignedDIV_REM64Impl()
3610 B.buildSExt(S32, B.buildICmp(CmpInst::ICMP_UGE, S1, Sub2_Lo, DenomLo)); in legalizeUnsignedDIV_REM64Impl()
3612 S32, B.buildICmp(CmpInst::ICMP_EQ, S1, Sub2_Hi, DenomHi), C5, C4); in legalizeUnsignedDIV_REM64Impl()
3616 auto Sub3_Lo = B.buildUSubo(S32, S1, Sub2_Lo, DenomLo); in legalizeUnsignedDIV_REM64Impl()
3618 auto Sub3_Mi = B.buildUSube(S32, S1, Sub2_Mi, DenomHi, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3619 auto Sub3_Hi = B.buildUSube(S32, S1, Sub3_Mi, Zero32, Sub3_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3663 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM() local
3669 if (Ty == S32) in legalizeUnsignedDIV_REM()
3684 const LLT S32 = LLT::scalar(32); in legalizeSignedDIV_REM() local
3687 if (Ty != S32 && Ty != S64) in legalizeSignedDIV_REM()
3694 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM()
3727 if (Ty == S32) in legalizeSignedDIV_REM()
3847 LLT S32 = LLT::scalar(32); in legalizeFDIV16() local
3849 auto LHSExt = B.buildFPExt(S32, LHS, Flags); in legalizeFDIV16()
3850 auto RHSExt = B.buildFPExt(S32, RHS, Flags); in legalizeFDIV16()
3852 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}, false) in legalizeFDIV16()
3856 auto QUOT = B.buildFMul(S32, LHSExt, RCP, Flags); in legalizeFDIV16()
3913 LLT S32 = LLT::scalar(32); in legalizeFDIV32() local
3916 auto One = B.buildFConstant(S32, 1.0f); in legalizeFDIV32()
3919 B.buildIntrinsic(Intrinsic::amdgcn_div_scale, {S32, S1}, false) in legalizeFDIV32()
3925 B.buildIntrinsic(Intrinsic::amdgcn_div_scale, {S32, S1}, false) in legalizeFDIV32()
3931 auto ApproxRcp = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}, false) in legalizeFDIV32()
3934 auto NegDivScale0 = B.buildFNeg(S32, DenominatorScaled, Flags); in legalizeFDIV32()
3941 auto Fma0 = B.buildFMA(S32, NegDivScale0, ApproxRcp, One, Flags); in legalizeFDIV32()
3942 auto Fma1 = B.buildFMA(S32, Fma0, ApproxRcp, ApproxRcp, Flags); in legalizeFDIV32()
3943 auto Mul = B.buildFMul(S32, NumeratorScaled, Fma1, Flags); in legalizeFDIV32()
3944 auto Fma2 = B.buildFMA(S32, NegDivScale0, Mul, NumeratorScaled, Flags); in legalizeFDIV32()
3945 auto Fma3 = B.buildFMA(S32, Fma2, Fma1, Mul, Flags); in legalizeFDIV32()
3946 auto Fma4 = B.buildFMA(S32, NegDivScale0, Fma3, NumeratorScaled, Flags); in legalizeFDIV32()
3951 auto Fmas = B.buildIntrinsic(Intrinsic::amdgcn_div_fmas, {S32}, false) in legalizeFDIV32()
4016 LLT S32 = LLT::scalar(32); in legalizeFDIV64() local
4018 auto NumUnmerge = B.buildUnmerge(S32, LHS); in legalizeFDIV64()
4019 auto DenUnmerge = B.buildUnmerge(S32, RHS); in legalizeFDIV64()
4020 auto Scale0Unmerge = B.buildUnmerge(S32, DivScale0); in legalizeFDIV64()
4021 auto Scale1Unmerge = B.buildUnmerge(S32, DivScale1); in legalizeFDIV64()
4057 LLT S32 = LLT::scalar(32); in legalizeFDIVFastIntrin() local
4060 auto Abs = B.buildFAbs(S32, RHS, Flags); in legalizeFDIVFastIntrin()
4063 auto C0 = B.buildConstant(S32, 0x6f800000); in legalizeFDIVFastIntrin()
4064 auto C1 = B.buildConstant(S32, 0x2f800000); in legalizeFDIVFastIntrin()
4065 auto C2 = B.buildConstant(S32, FloatToBits(1.0f)); in legalizeFDIVFastIntrin()
4068 auto Sel = B.buildSelect(S32, CmpRes, C1, C2, Flags); in legalizeFDIVFastIntrin()
4070 auto Mul0 = B.buildFMul(S32, RHS, Sel, Flags); in legalizeFDIVFastIntrin()
4072 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}, false) in legalizeFDIVFastIntrin()
4076 auto Mul1 = B.buildFMul(S32, LHS, RCP, Flags); in legalizeFDIVFastIntrin()
4254 const LLT S32 = LLT::scalar(32); in splitBufferOffsets() local
4280 BaseReg = B.buildConstant(S32, Overflow).getReg(0); in splitBufferOffsets()
4282 auto OverflowVal = B.buildConstant(S32, Overflow); in splitBufferOffsets()
4283 BaseReg = B.buildAdd(S32, BaseReg, OverflowVal).getReg(0); in splitBufferOffsets()
4288 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
4324 const LLT S32 = LLT::scalar(32); in handleD16VData() local
4333 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
4337 return B.buildBuildVector(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
4344 Reg = B.buildBitcast(S32, Reg).getReg(0); in handleD16VData()
4346 PackedRegs.resize(2, B.buildUndef(S32).getReg(0)); in handleD16VData()
4347 return B.buildBuildVector(LLT::fixed_vector(2, S32), PackedRegs) in handleD16VData()
4358 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
4363 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
4364 auto Unmerge = B.buildUnmerge(S32, Reg); in handleD16VData()
4367 PackedRegs.resize(4, B.buildUndef(S32).getReg(0)); in handleD16VData()
4368 return B.buildBuildVector(LLT::fixed_vector(4, S32), PackedRegs) in handleD16VData()
4414 const LLT S32 = LLT::scalar(32); in legalizeBufferStore() local
4435 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferStore()
4500 const LLT S32 = LLT::scalar(32); in legalizeBufferLoad() local
4516 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferLoad()
4568 LoadDstReg = B.getMRI()->createGenericVirtualRegister(S32); in legalizeBufferLoad()
4598 auto Unmerge = B.buildUnmerge(S32, LoadDstReg); in legalizeBufferLoad()
4815 const LLT S32 = LLT::scalar(32); in convertImageAddrToPacked() local
4822 assert(B.getMRI()->getType(SrcOp.getReg()) == S32); in convertImageAddrToPacked()
4831 auto Undef = B.buildUndef(S32); in convertImageAddrToPacked()
4876 const LLT S32 = LLT::scalar(32); in legalizeImageIntrinsic() local
5068 RegTy = S32; in legalizeImageIntrinsic()
5075 TFETy = LLT::fixed_vector(RoundedSize / 32 + 1, S32); in legalizeImageIntrinsic()
5076 RegTy = !IsTFE && EltSize == 16 ? V2S16 : S32; in legalizeImageIntrinsic()
5105 if (MRI->getType(Dst1Reg) != S32) in legalizeImageIntrinsic()
5112 if (Ty == S32) { in legalizeImageIntrinsic()
5389 const LLT S32 = LLT::scalar(32); in legalizeBVHIntrinsic() local
5436 auto packLanes = [&Ops, &S32, &V3S32, &B](Register Src) { in legalizeBVHIntrinsic()
5437 auto Unmerge = B.buildUnmerge({S32, S32, S32}, Src); in legalizeBVHIntrinsic()
5452 {B.buildBitcast(S32, B.buildMerge(V2S16, {UnmergeRayInvDir.getReg(0), in legalizeBVHIntrinsic()
5455 B.buildBitcast(S32, B.buildMerge(V2S16, {UnmergeRayInvDir.getReg(1), in legalizeBVHIntrinsic()
5458 B.buildBitcast(S32, B.buildMerge(V2S16, {UnmergeRayInvDir.getReg(2), in legalizeBVHIntrinsic()
5468 auto Unmerge = B.buildUnmerge({S32, S32}, NodePtr); in legalizeBVHIntrinsic()
5476 auto packLanes = [&Ops, &S32, &B](Register Src) { in legalizeBVHIntrinsic()
5477 auto Unmerge = B.buildUnmerge({S32, S32, S32}, Src); in legalizeBVHIntrinsic()
5487 Register R1 = MRI.createGenericVirtualRegister(S32); in legalizeBVHIntrinsic()
5488 Register R2 = MRI.createGenericVirtualRegister(S32); in legalizeBVHIntrinsic()
5489 Register R3 = MRI.createGenericVirtualRegister(S32); in legalizeBVHIntrinsic()