Lines Matching refs:LLT
50 static LLT getPow2VectorType(LLT Ty) { in getPow2VectorType()
57 static LLT getPow2ScalarType(LLT Ty) { in getPow2ScalarType()
60 return LLT::scalar(Pow2Bits); in getPow2ScalarType()
68 const LLT Ty = Query.Types[TypeIdx]; in isSmallOddVector()
72 const LLT EltTy = Ty.getElementType(); in isSmallOddVector()
82 const LLT Ty = Query.Types[TypeIdx]; in sizeIsMultipleOf32()
89 const LLT Ty = Query.Types[TypeIdx]; in isWideVec16()
90 const LLT EltTy = Ty.getScalarType(); in isWideVec16()
97 const LLT Ty = Query.Types[TypeIdx]; in oneMoreElement()
98 const LLT EltTy = Ty.getElementType(); in oneMoreElement()
100 LLT::fixed_vector(Ty.getNumElements() + 1, EltTy)); in oneMoreElement()
106 const LLT Ty = Query.Types[TypeIdx]; in fewerEltsToSize64Vector()
107 const LLT EltTy = Ty.getElementType(); in fewerEltsToSize64Vector()
113 LLT::scalarOrVector(ElementCount::getFixed(NewNumElts), EltTy)); in fewerEltsToSize64Vector()
121 const LLT Ty = Query.Types[TypeIdx]; in moreEltsToNext32Bit()
123 const LLT EltTy = Ty.getElementType(); in moreEltsToNext32Bit()
131 return std::make_pair(TypeIdx, LLT::fixed_vector(NewNumElts, EltTy)); in moreEltsToNext32Bit()
135 static LLT getBitcastRegisterType(const LLT Ty) { in getBitcastRegisterType()
141 return LLT::scalar(Size); in getBitcastRegisterType()
144 return LLT::scalarOrVector(ElementCount::getFixed(Size / 32), 32); in getBitcastRegisterType()
149 const LLT Ty = Query.Types[TypeIdx]; in bitcastToRegisterType()
156 const LLT Ty = Query.Types[TypeIdx]; in bitcastToVectorElement32()
160 TypeIdx, LLT::scalarOrVector(ElementCount::getFixed(Size / 32), 32)); in bitcastToVectorElement32()
166 const LLT QueryTy = Query.Types[TypeIdx]; in vectorSmallerThan()
173 const LLT QueryTy = Query.Types[TypeIdx]; in vectorWiderThan()
180 const LLT QueryTy = Query.Types[TypeIdx]; in numElementsNotEven()
189 static bool isRegisterVectorElementType(LLT EltTy) { in isRegisterVectorElementType()
194 static bool isRegisterVectorType(LLT Ty) { in isRegisterVectorType()
201 static bool isRegisterType(LLT Ty) { in isRegisterType()
221 const LLT QueryTy = Query.Types[TypeIdx]; in elementTypeIsLegal()
224 const LLT EltTy = QueryTy.getElementType(); in elementTypeIsLegal()
225 return EltTy == LLT::scalar(16) || EltTy.getSizeInBits() >= 32; in elementTypeIsLegal()
233 const LLT Ty = Query.Types[TypeIdx]; in isWideScalarExtLoadTruncStore()
269 const LLT Ty = Query.Types[0]; in isLoadStoreSizeLegal()
337 static bool loadStoreBitcastWorkaround(const LLT Ty) { in loadStoreBitcastWorkaround()
347 LLT EltTy = Ty.getElementType(); in loadStoreBitcastWorkaround()
356 const LLT Ty = Query.Types[0]; in isLoadStoreLegal()
363 static bool shouldBitcastLoadStoreType(const GCNSubtarget &ST, const LLT Ty, in shouldBitcastLoadStoreType()
364 const LLT MemTy) { in shouldBitcastLoadStoreType()
382 static bool shouldWidenLoad(const GCNSubtarget &ST, LLT MemoryTy, in shouldWidenLoad()
432 return LLT::pointer(AS, TM.getPointerSizeInBits(AS)); in AMDGPULegalizerInfo()
435 const LLT S1 = LLT::scalar(1); in AMDGPULegalizerInfo()
436 const LLT S8 = LLT::scalar(8); in AMDGPULegalizerInfo()
437 const LLT S16 = LLT::scalar(16); in AMDGPULegalizerInfo()
438 const LLT S32 = LLT::scalar(32); in AMDGPULegalizerInfo()
439 const LLT S64 = LLT::scalar(64); in AMDGPULegalizerInfo()
440 const LLT S128 = LLT::scalar(128); in AMDGPULegalizerInfo()
441 const LLT S256 = LLT::scalar(256); in AMDGPULegalizerInfo()
442 const LLT S512 = LLT::scalar(512); in AMDGPULegalizerInfo()
443 const LLT MaxScalar = LLT::scalar(MaxRegisterSize); in AMDGPULegalizerInfo()
445 const LLT V2S8 = LLT::fixed_vector(2, 8); in AMDGPULegalizerInfo()
446 const LLT V2S16 = LLT::fixed_vector(2, 16); in AMDGPULegalizerInfo()
447 const LLT V4S16 = LLT::fixed_vector(4, 16); in AMDGPULegalizerInfo()
449 const LLT V2S32 = LLT::fixed_vector(2, 32); in AMDGPULegalizerInfo()
450 const LLT V3S32 = LLT::fixed_vector(3, 32); in AMDGPULegalizerInfo()
451 const LLT V4S32 = LLT::fixed_vector(4, 32); in AMDGPULegalizerInfo()
452 const LLT V5S32 = LLT::fixed_vector(5, 32); in AMDGPULegalizerInfo()
453 const LLT V6S32 = LLT::fixed_vector(6, 32); in AMDGPULegalizerInfo()
454 const LLT V7S32 = LLT::fixed_vector(7, 32); in AMDGPULegalizerInfo()
455 const LLT V8S32 = LLT::fixed_vector(8, 32); in AMDGPULegalizerInfo()
456 const LLT V9S32 = LLT::fixed_vector(9, 32); in AMDGPULegalizerInfo()
457 const LLT V10S32 = LLT::fixed_vector(10, 32); in AMDGPULegalizerInfo()
458 const LLT V11S32 = LLT::fixed_vector(11, 32); in AMDGPULegalizerInfo()
459 const LLT V12S32 = LLT::fixed_vector(12, 32); in AMDGPULegalizerInfo()
460 const LLT V13S32 = LLT::fixed_vector(13, 32); in AMDGPULegalizerInfo()
461 const LLT V14S32 = LLT::fixed_vector(14, 32); in AMDGPULegalizerInfo()
462 const LLT V15S32 = LLT::fixed_vector(15, 32); in AMDGPULegalizerInfo()
463 const LLT V16S32 = LLT::fixed_vector(16, 32); in AMDGPULegalizerInfo()
464 const LLT V32S32 = LLT::fixed_vector(32, 32); in AMDGPULegalizerInfo()
466 const LLT V2S64 = LLT::fixed_vector(2, 64); in AMDGPULegalizerInfo()
467 const LLT V3S64 = LLT::fixed_vector(3, 64); in AMDGPULegalizerInfo()
468 const LLT V4S64 = LLT::fixed_vector(4, 64); in AMDGPULegalizerInfo()
469 const LLT V5S64 = LLT::fixed_vector(5, 64); in AMDGPULegalizerInfo()
470 const LLT V6S64 = LLT::fixed_vector(6, 64); in AMDGPULegalizerInfo()
471 const LLT V7S64 = LLT::fixed_vector(7, 64); in AMDGPULegalizerInfo()
472 const LLT V8S64 = LLT::fixed_vector(8, 64); in AMDGPULegalizerInfo()
473 const LLT V16S64 = LLT::fixed_vector(16, 64); in AMDGPULegalizerInfo()
475 std::initializer_list<LLT> AllS32Vectors = in AMDGPULegalizerInfo()
478 std::initializer_list<LLT> AllS64Vectors = in AMDGPULegalizerInfo()
481 const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS); in AMDGPULegalizerInfo()
482 const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS); in AMDGPULegalizerInfo()
483 const LLT Constant32Ptr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS_32BIT); in AMDGPULegalizerInfo()
484 const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS); in AMDGPULegalizerInfo()
485 const LLT RegionPtr = GetAddrSpacePtr(AMDGPUAS::REGION_ADDRESS); in AMDGPULegalizerInfo()
486 const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS::FLAT_ADDRESS); in AMDGPULegalizerInfo()
487 const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS); in AMDGPULegalizerInfo()
489 const LLT CodePtr = FlatPtr; in AMDGPULegalizerInfo()
491 const std::initializer_list<LLT> AddrSpaces64 = { in AMDGPULegalizerInfo()
495 const std::initializer_list<LLT> AddrSpaces32 = { in AMDGPULegalizerInfo()
499 const std::initializer_list<LLT> FPTypesBase = { in AMDGPULegalizerInfo()
503 const std::initializer_list<LLT> FPTypes16 = { in AMDGPULegalizerInfo()
507 const std::initializer_list<LLT> FPTypesPK16 = { in AMDGPULegalizerInfo()
511 const LLT MinScalarFPTy = ST.has16BitInsts() ? S16 : S32; in AMDGPULegalizerInfo()
1066 return std::make_pair(1, LLT::scalar(Query.Types[0].getSizeInBits())); in AMDGPULegalizerInfo()
1070 return std::make_pair(1, LLT::scalar(Query.Types[0].getSizeInBits())); in AMDGPULegalizerInfo()
1082 return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits())); in AMDGPULegalizerInfo()
1087 return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits())); in AMDGPULegalizerInfo()
1096 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1104 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1203 [=](const LegalityQuery &Query) -> std::pair<unsigned, LLT> { in AMDGPULegalizerInfo()
1204 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1205 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1212 return std::make_pair(0, LLT::scalar(MemSize)); in AMDGPULegalizerInfo()
1218 return std::make_pair(0, LLT::scalar(MaxSize)); in AMDGPULegalizerInfo()
1221 return std::make_pair(0, LLT::scalar(Align)); in AMDGPULegalizerInfo()
1228 [=](const LegalityQuery &Query) -> std::pair<unsigned, LLT> { in AMDGPULegalizerInfo()
1229 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1230 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1232 LLT EltTy = DstTy.getElementType(); in AMDGPULegalizerInfo()
1249 0, LLT::scalarOrVector( in AMDGPULegalizerInfo()
1262 0, LLT::fixed_vector(NumElts / NumPieces, EltTy)); in AMDGPULegalizerInfo()
1277 0, LLT::scalarOrVector( in AMDGPULegalizerInfo()
1370 LLT::fixed_vector(2, LocalPtr), in AMDGPULegalizerInfo()
1371 LLT::fixed_vector(2, PrivatePtr)}, in AMDGPULegalizerInfo()
1400 const LLT ValTy = Query.Types[0]; in AMDGPULegalizerInfo()
1401 const LLT AmountTy = Query.Types[1]; in AMDGPULegalizerInfo()
1436 const LLT EltTy = Query.Types[EltTypeIdx]; in AMDGPULegalizerInfo()
1437 const LLT VecTy = Query.Types[VecTypeIdx]; in AMDGPULegalizerInfo()
1438 const LLT IdxTy = Query.Types[IdxTypeIdx]; in AMDGPULegalizerInfo()
1454 const LLT EltTy = Query.Types[EltTypeIdx]; in AMDGPULegalizerInfo()
1455 const LLT VecTy = Query.Types[VecTypeIdx]; in AMDGPULegalizerInfo()
1462 LLT::fixed_vector(VecSize / TargetEltSize, TargetEltSize)); in AMDGPULegalizerInfo()
1476 const LLT &EltTy = Query.Types[1].getElementType(); in AMDGPULegalizerInfo()
1491 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1496 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1497 const LLT LitTy = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1503 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1509 const LLT LitTy = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1569 const LLT Ty = Query.Types[TypeIdx]; in AMDGPULegalizerInfo()
1571 const LLT &EltTy = Ty.getElementType(); in AMDGPULegalizerInfo()
1584 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1613 const LLT Ty = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1621 const LLT Ty = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1628 const LLT &Ty = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1635 return std::make_pair(BigTyIdx, LLT::scalar(NewSizeInBits)); in AMDGPULegalizerInfo()
1825 const LLT S32 = LLT::scalar(32); in getSegmentAperture()
1857 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getSegmentAperture()
1868 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getSegmentAperture()
1878 LLT::scalar(32), commonAlignment(Align(64), Offset)); in getSegmentAperture()
1882 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in getSegmentAperture()
1888 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getSegmentAperture()
1901 LLT::scalar(32), commonAlignment(Align(64), StructOffset)); in getSegmentAperture()
1904 B.buildConstant(LLT::scalar(64), StructOffset).getReg(0)); in getSegmentAperture()
1934 const LLT S32 = LLT::scalar(32); in legalizeAddrSpaceCast()
1938 LLT DstTy = MRI.getType(Dst); in legalizeAddrSpaceCast()
1939 LLT SrcTy = MRI.getType(Src); in legalizeAddrSpaceCast()
1974 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, FlatNull.getReg(0)); in legalizeAddrSpaceCast()
2007 auto CmpRes = B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, in legalizeAddrSpaceCast()
2033 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS_32BIT, 32), AddrHiVal); in legalizeAddrSpaceCast()
2053 LLT Ty = MRI.getType(Src); in legalizeFrint()
2069 auto Cond = B.buildFCmp(CmpInst::FCMP_OGT, LLT::scalar(1), Fabs, C2); in legalizeFrint()
2079 const LLT S1 = LLT::scalar(1); in legalizeFceil()
2080 const LLT S64 = LLT::scalar(64); in legalizeFceil()
2111 LLT Ty = MRI.getType(DstReg); in legalizeFrem()
2125 LLT S32 = LLT::scalar(32); in extractF64Exponent()
2141 const LLT S1 = LLT::scalar(1); in legalizeIntrinsicTrunc()
2142 const LLT S32 = LLT::scalar(32); in legalizeIntrinsicTrunc()
2143 const LLT S64 = LLT::scalar(64); in legalizeIntrinsicTrunc()
2190 const LLT S64 = LLT::scalar(64); in legalizeITOFP()
2191 const LLT S32 = LLT::scalar(32); in legalizeITOFP()
2254 const LLT S64 = LLT::scalar(64); in legalizeFPTOI()
2255 const LLT S32 = LLT::scalar(32); in legalizeFPTOI()
2257 const LLT SrcLT = MRI.getType(Src); in legalizeFPTOI()
2351 LLT VecTy = MRI.getType(Vec); in legalizeExtractVectorElt()
2352 LLT EltTy = VecTy.getElementType(); in legalizeExtractVectorElt()
2386 LLT VecTy = MRI.getType(Vec); in legalizeInsertVectorElt()
2387 LLT EltTy = VecTy.getElementType(); in legalizeInsertVectorElt()
2411 const LLT V2S16 = LLT::fixed_vector(2, 16); in legalizeShuffleVector()
2415 LLT DstTy = MRI.getType(Dst); in legalizeShuffleVector()
2416 LLT SrcTy = MRI.getType(Src0); in legalizeShuffleVector()
2434 LLT Ty = MRI.getType(DstReg); in legalizeSinCos()
2456 bool AMDGPULegalizerInfo::buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, in buildPCRelGlobalAddress()
2495 LLT ConstPtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in buildPCRelGlobalAddress()
2520 LLT Ty = MRI.getType(DstReg); in legalizeGlobalValue()
2566 LLT S32 = LLT::scalar(32); in legalizeGlobalValue()
2595 LLT PtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in legalizeGlobalValue()
2598 LLT LoadTy = Ty.getSizeInBits() == 32 ? PtrTy : Ty; in legalizeGlobalValue()
2618 static LLT widenToNextPowerOf2(LLT Ty) { in widenToNextPowerOf2()
2622 return LLT::scalar(PowerOf2Ceil(Ty.getSizeInBits())); in widenToNextPowerOf2()
2632 LLT PtrTy = MRI.getType(PtrReg); in legalizeLoad()
2636 LLT ConstPtr = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in legalizeLoad()
2648 LLT ValTy = MRI.getType(ValReg); in legalizeLoad()
2652 const LLT MemTy = MMO->getMemoryType(); in legalizeLoad()
2678 LLT WideTy = widenToNextPowerOf2(ValTy); in legalizeLoad()
2710 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFMad()
2718 if (Ty == LLT::scalar(32) && !MFI->getMode().allFP32Denormals()) in legalizeFMad()
2720 if (Ty == LLT::scalar(16) && !MFI->getMode().allFP64FP16Denormals()) in legalizeFMad()
2739 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg()
2740 LLT VecTy = LLT::fixed_vector(2, ValTy); in legalizeAtomicCmpXChg()
2758 LLT Ty = B.getMRI()->getType(Dst); in legalizeFlog()
2774 LLT Ty = B.getMRI()->getType(Dst); in legalizeFExp()
2789 LLT Ty = B.getMRI()->getType(Dst); in legalizeFPow()
2790 const LLT S16 = LLT::scalar(16); in legalizeFPow()
2791 const LLT S32 = LLT::scalar(32); in legalizeFPow()
2834 const LLT S1 = LLT::scalar(1); in legalizeFFloor()
2835 const LLT S64 = LLT::scalar(64); in legalizeFFloor()
2891 const LLT S32 = LLT::scalar(32); in legalizeBuildVector()
2892 assert(MRI.getType(Dst) == LLT::fixed_vector(2, 16)); in legalizeBuildVector()
2896 assert(MRI.getType(Src0) == LLT::scalar(16)); in legalizeBuildVector()
2924 const LLT S1 = LLT::scalar(1); in buildMultiply()
2925 const LLT S32 = LLT::scalar(32); in buildMultiply()
2926 const LLT S64 = LLT::scalar(64); in buildMultiply()
3160 LLT Ty = MRI.getType(DstReg); in legalizeMul()
3178 LLT S32 = LLT::scalar(32); in legalizeMul()
3205 LLT DstTy = MRI.getType(Dst); in legalizeCTLZ_CTTZ()
3206 LLT SrcTy = MRI.getType(Src); in legalizeCTLZ_CTTZ()
3272 LLT ArgTy) const { in loadInputValue()
3281 const LLT S32 = LLT::scalar(32); in loadInputValue()
3308 LLT ArgTy; in loadInputValue()
3357 LLT ArgTy; in legalizeWorkitemIDIntrinsic()
3377 Register TmpReg = MRI.createGenericVirtualRegister(LLT::scalar(32)); in legalizeWorkitemIDIntrinsic()
3389 LLT PtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in getKernargParameterPtr()
3398 auto COffset = B.buildConstant(LLT::scalar(64), Offset); in getKernargParameterPtr()
3411 assert(B.getMRI()->getType(DstReg) == LLT::scalar(32) && in legalizeKernargMemParameter()
3427 LLT DstTy = MRI.getType(Dst); in legalizeFDIV()
3428 LLT S16 = LLT::scalar(16); in legalizeFDIV()
3429 LLT S32 = LLT::scalar(32); in legalizeFDIV()
3430 LLT S64 = LLT::scalar(64); in legalizeFDIV()
3447 const LLT S1 = LLT::scalar(1); in legalizeUnsignedDIV_REM32Impl()
3448 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM32Impl()
3500 const LLT S32 = LLT::scalar(32); in emitReciprocalU64()
3533 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM64Impl()
3534 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM64Impl()
3535 const LLT S1 = LLT::scalar(1); in legalizeUnsignedDIV_REM64Impl()
3662 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM()
3663 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM()
3667 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeUnsignedDIV_REM()
3683 const LLT S64 = LLT::scalar(64); in legalizeSignedDIV_REM()
3684 const LLT S32 = LLT::scalar(32); in legalizeSignedDIV_REM()
3686 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeSignedDIV_REM()
3755 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV()
3804 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV64()
3846 LLT S16 = LLT::scalar(16); in legalizeFDIV16()
3847 LLT S32 = LLT::scalar(32); in legalizeFDIV16()
3913 LLT S32 = LLT::scalar(32); in legalizeFDIV32()
3914 LLT S1 = LLT::scalar(1); in legalizeFDIV32()
3980 LLT S64 = LLT::scalar(64); in legalizeFDIV64()
3981 LLT S1 = LLT::scalar(1); in legalizeFDIV64()
4016 LLT S32 = LLT::scalar(32); in legalizeFDIV64()
4057 LLT S32 = LLT::scalar(32); in legalizeFDIVFastIntrin()
4058 LLT S1 = LLT::scalar(1); in legalizeFDIVFastIntrin()
4100 LLT Ty = MRI.getType(Dst); in legalizeRsqClampIntrinsic()
4103 if (Ty == LLT::scalar(32)) in legalizeRsqClampIntrinsic()
4105 else if (Ty == LLT::scalar(64)) in legalizeRsqClampIntrinsic()
4170 LLT DstTy = MRI.getType(DstReg); in getImplicitArgPtr()
4171 LLT IdxTy = LLT::scalar(DstTy.getSizeInBits()); in getImplicitArgPtr()
4234 auto Unmerge = B.buildUnmerge(LLT::scalar(32), MI.getOperand(2).getReg()); in legalizeIsAddrSpace()
4254 const LLT S32 = LLT::scalar(32); in splitBufferOffsets()
4323 const LLT S16 = LLT::scalar(16); in handleD16VData()
4324 const LLT S32 = LLT::scalar(32); in handleD16VData()
4325 LLT StoreVT = MRI.getType(Reg); in handleD16VData()
4337 return B.buildBuildVector(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
4347 return B.buildBuildVector(LLT::fixed_vector(2, S32), PackedRegs) in handleD16VData()
4357 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
4358 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
4363 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
4368 return B.buildBuildVector(LLT::fixed_vector(4, S32), PackedRegs) in handleD16VData()
4375 if (StoreVT == LLT::fixed_vector(3, S16)) { in handleD16VData()
4376 Reg = B.buildPadVectorWithUndefElements(LLT::fixed_vector(4, S16), Reg) in handleD16VData()
4385 LLT Ty = MRI->getType(VData); in fixStoreSourceType()
4387 const LLT S16 = LLT::scalar(16); in fixStoreSourceType()
4390 if (Ty == LLT::scalar(8) || Ty == S16) { in fixStoreSourceType()
4391 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
4411 LLT Ty = MRI.getType(VData); in legalizeBufferStore()
4412 LLT EltTy = Ty.getScalarType(); in legalizeBufferStore()
4414 const LLT S32 = LLT::scalar(32); in legalizeBufferStore()
4499 const LLT MemTy = MMO->getMemoryType(); in legalizeBufferLoad()
4500 const LLT S32 = LLT::scalar(32); in legalizeBufferLoad()
4531 LLT Ty = MRI.getType(Dst); in legalizeBufferLoad()
4532 LLT EltTy = Ty.getScalarType(); in legalizeBufferLoad()
4565 LLT UnpackedTy = Ty.changeElementSize(32); in legalizeBufferLoad()
4714 VIndex = B.buildConstant(LLT::scalar(32), 0).getReg(0); in legalizeBufferAtomic()
4757 const LLT S16 = LLT::scalar(16); in packImage16bitOpsToDwords()
4758 const LLT V2S16 = LLT::fixed_vector(2, 16); in packImage16bitOpsToDwords()
4815 const LLT S32 = LLT::scalar(32); in convertImageAddrToPacked()
4837 B.buildBuildVector(LLT::fixed_vector(NumAddrRegs, 32), AddrRegs); in convertImageAddrToPacked()
4876 const LLT S32 = LLT::scalar(32); in legalizeImageIntrinsic()
4877 const LLT S16 = LLT::scalar(16); in legalizeImageIntrinsic()
4878 const LLT V2S16 = LLT::fixed_vector(2, 16); in legalizeImageIntrinsic()
4882 LLT Ty = MRI->getType(VData); in legalizeImageIntrinsic()
4885 LLT GradTy = in legalizeImageIntrinsic()
4887 LLT AddrTy = in legalizeImageIntrinsic()
4930 LLT Ty = MRI->getType(VData0); in legalizeImageIntrinsic()
4939 LLT PackedTy = LLT::fixed_vector(2, Ty); in legalizeImageIntrinsic()
4972 LLT PackedAddrTy = LLT::fixed_vector(2 * PackedRegs.size(), 16); in legalizeImageIntrinsic()
5039 const LLT EltTy = Ty.getScalarType(); in legalizeImageIntrinsic()
5050 const LLT AdjustedTy = in legalizeImageIntrinsic()
5056 LLT RoundedTy; in legalizeImageIntrinsic()
5059 LLT TFETy; in legalizeImageIntrinsic()
5062 LLT RegTy; in legalizeImageIntrinsic()
5066 LLT::scalarOrVector(ElementCount::getFixed(AdjustedNumElts), 32); in legalizeImageIntrinsic()
5067 TFETy = LLT::fixed_vector(AdjustedNumElts + 1, 32); in legalizeImageIntrinsic()
5073 RoundedTy = LLT::scalarOrVector( in legalizeImageIntrinsic()
5075 TFETy = LLT::fixed_vector(RoundedSize / 32 + 1, S32); in legalizeImageIntrinsic()
5091 const LLT LoadResultTy = IsTFE ? TFETy : RoundedTy; in legalizeImageIntrinsic()
5169 auto padWithUndef = [&](LLT Ty, int NumElts) { in legalizeImageIntrinsic()
5178 LLT ResTy = MRI->getType(ResultRegs[0]); in legalizeImageIntrinsic()
5189 const LLT V3S16 = LLT::fixed_vector(3, 16); in legalizeImageIntrinsic()
5195 LLT V4S16 = LLT::fixed_vector(4, 16); in legalizeImageIntrinsic()
5222 LLT Ty = B.getMRI()->getType(Dst); in legalizeSBufferLoad()
5228 if (shouldBitcastLoadStoreType(ST, Ty, LLT::scalar(Size))) { in legalizeSBufferLoad()
5300 const LLT S64 = LLT::scalar(64); in legalizeTrapHsaQueuePtr()
5311 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in legalizeTrapHsaQueuePtr()
5323 LLT::scalar(64), commonAlignment(Align(64), Offset)); in legalizeTrapHsaQueuePtr()
5327 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in legalizeTrapHsaQueuePtr()
5329 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in legalizeTrapHsaQueuePtr()
5343 MRI.createGenericVirtualRegister(LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in legalizeTrapHsaQueuePtr()
5388 const LLT S16 = LLT::scalar(16); in legalizeBVHIntrinsic()
5389 const LLT S32 = LLT::scalar(32); in legalizeBVHIntrinsic()
5390 const LLT V2S16 = LLT::fixed_vector(2, 16); in legalizeBVHIntrinsic()
5391 const LLT V3S32 = LLT::fixed_vector(3, 32); in legalizeBVHIntrinsic()
5505 LLT OpTy = LLT::fixed_vector(Ops.size(), 32); in legalizeBVHIntrinsic()