287   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_AND_OR_XOR()
314   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_ADD_SUB()
504   const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, *MRI, TRI);  in selectG_EXTRACT()
536   const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_MERGE_VALUES()
578   const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, *MRI, TRI);  in selectG_UNMERGE_VALUES()
621   const RegisterBank *DstBank = RBI.getRegBank(Dst, *MRI, TRI);  in selectG_BUILD_VECTOR_TRUNC()
753   const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_INSERT()
759   const RegisterBank *Src0Bank = RBI.getRegBank(Src0Reg, *MRI, TRI);  in selectG_INSERT()
760   const RegisterBank *Src1Bank = RBI.getRegBank(Src1Reg, *MRI, TRI);  in selectG_INSERT()
793   assert(RBI.getRegBank(DstReg, *MRI, TRI)->getID() == AMDGPU::VGPRRegBankID &&  in selectG_SBFX_UBFX()
1211   const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI);  in selectRelocConstant()
1237   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectGroupStaticSize()
1407   const RegisterBank *OffsetRB = RBI.getRegBank(BaseOffset, *MRI, TRI);  in selectDSGWSIntrinsic()
1927   const RegisterBank *SrcRB = RBI.getRegBank(SrcReg, *MRI, TRI);  in selectG_TRUNC()
1934     DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_TRUNC()
2087     const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_SZA_EXT()
2202   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_CONSTANT()
2274   const RegisterBank *DstRB = RBI.getRegBank(Dst, *MRI, TRI);  in selectG_FNEG()
2319   const RegisterBank *DstRB = RBI.getRegBank(Dst, *MRI, TRI);  in selectG_FABS()
2385     const RegisterBank *OpBank = RBI.getRegBank(GEPOp.getReg(), MRI, TRI);  in getAddrModeInfo()
2397   return RBI.getRegBank(Reg, *MRI, TRI)->getID() == AMDGPU::SGPRRegBankID;  in isSGPR()
2536   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_GLOBAL_VALUE()
2555   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_PTRMASK()
2556   const RegisterBank *SrcRB = RBI.getRegBank(SrcReg, *MRI, TRI);  in selectG_PTRMASK()
2557   const RegisterBank *MaskRB = RBI.getRegBank(MaskReg, *MRI, TRI);  in selectG_PTRMASK()
2691   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_EXTRACT_VECTOR_ELT()
2692   const RegisterBank *SrcRB = RBI.getRegBank(SrcReg, *MRI, TRI);  in selectG_EXTRACT_VECTOR_ELT()
2693   const RegisterBank *IdxRB = RBI.getRegBank(IdxReg, *MRI, TRI);  in selectG_EXTRACT_VECTOR_ELT()
2771   const RegisterBank *VecRB = RBI.getRegBank(VecReg, *MRI, TRI);  in selectG_INSERT_VECTOR_ELT()
2772   const RegisterBank *ValRB = RBI.getRegBank(ValReg, *MRI, TRI);  in selectG_INSERT_VECTOR_ELT()
2773   const RegisterBank *IdxRB = RBI.getRegBank(IdxReg, *MRI, TRI);  in selectG_INSERT_VECTOR_ELT()
2882   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectG_SHUFFLE_VECTOR()
3408   const RegisterBank *DstRB = RBI.getRegBank(DstReg, *MRI, TRI);  in selectWaveAddress()
3602       RBI.getRegBank(Src, *MRI, TRI)->getID() != AMDGPU::VGPRRegBankID) {  in selectVOP3ModsImpl()
4222   if (RBI.getRegBank(RHS, *MRI, TRI)->getID() != AMDGPU::VGPRRegBankID)  in selectScratchSVAddr()
4658   const RegisterBank *N0Bank = RBI.getRegBank(Addr.N0, *MRI, TRI);  in shouldUseAddr64()
4699     if (RBI.getRegBank(N2, *MRI, TRI)->getID() == AMDGPU::VGPRRegBankID) {  in selectMUBUFAddr64Impl()
4701       if (RBI.getRegBank(N3, *MRI, TRI)->getID() == AMDGPU::VGPRRegBankID) {  in selectMUBUFAddr64Impl()
4714   } else if (RBI.getRegBank(N0, *MRI, TRI)->getID() == AMDGPU::VGPRRegBankID) {  in selectMUBUFAddr64Impl()