Lines Matching refs:MachineInstrBuilder
544 MachineInstrBuilder MIB = in selectG_MERGE_VALUES()
1363 MachineInstrBuilder DS = in selectDSOrderedIntrinsic()
3575 [=](MachineInstrBuilder &MIB) { MIB.add(Root); } in selectVCSRC()
3624 [=](MachineInstrBuilder &MIB) { MIB.add(Root); } in selectVSRC0()
3635 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3Mods0()
3636 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); }, // src0_mods in selectVOP3Mods0()
3637 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); }, // clamp in selectVOP3Mods0()
3638 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); } // omod in selectVOP3Mods0()
3649 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3BMods0()
3650 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); }, // src0_mods in selectVOP3BMods0()
3651 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); }, // clamp in selectVOP3BMods0()
3652 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); } // omod in selectVOP3BMods0()
3659 [=](MachineInstrBuilder &MIB) { MIB.add(Root); }, in selectVOP3OMods()
3660 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); }, // clamp in selectVOP3OMods()
3661 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); } // omod in selectVOP3OMods()
3672 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3Mods()
3673 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); } // src_mods in selectVOP3Mods()
3684 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3BMods()
3685 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); } // src_mods in selectVOP3BMods()
3697 [=](MachineInstrBuilder &MIB) { MIB.addReg(Reg); }, in selectVOP3NoMods()
3735 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3PMods()
3736 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); } // src_mods in selectVOP3PMods()
3750 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3PModsDOT()
3751 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); } // src_mods in selectVOP3PModsDOT()
3766 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); } // src_mods in selectDotIUVOP3PMods()
3780 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); } // src_mods in selectWMMAOpSelVOP3PMods()
3793 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVOP3Mods_nnan()
3794 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); } // src_mods in selectVOP3Mods_nnan()
3802 [=](MachineInstrBuilder &MIB) { MIB.addReg(Root.getReg()); }, in selectVOP3OpSelMods()
3803 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); } // src_mods in selectVOP3OpSelMods()
3817 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVINTERPMods()
3818 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); }, // src0_mods in selectVINTERPMods()
3832 [=](MachineInstrBuilder &MIB) { MIB.addReg(Src); }, in selectVINTERPModsHi()
3833 [=](MachineInstrBuilder &MIB) { MIB.addImm(Mods); }, // src0_mods in selectVINTERPModsHi()
3911 return {{[=](MachineInstrBuilder &MIB) { MIB.addReg(Base); }, in selectSmrdImm()
3912 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); }}}; in selectSmrdImm()
3931 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrReg); }, in selectSmrdImm32()
3932 [=](MachineInstrBuilder &MIB) { MIB.addImm(*EncodedImm); } in selectSmrdImm32()
3942 return {{[=](MachineInstrBuilder &MIB) { MIB.addReg(Base); }, in selectSmrdSgpr()
3943 [=](MachineInstrBuilder &MIB) { MIB.addReg(SOffset); }}}; in selectSmrdSgpr()
3953 return {{[=](MachineInstrBuilder &MIB) { MIB.addReg(Base); }, in selectSmrdSgprImm()
3954 [=](MachineInstrBuilder &MIB) { MIB.addReg(SOffset); }, in selectSmrdSgprImm()
3955 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); }}}; in selectSmrdSgprImm()
3987 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrWithOffset.first); }, in selectFlatOffset()
3988 [=](MachineInstrBuilder &MIB) { MIB.addImm(PtrWithOffset.second); }, in selectFlatOffset()
3997 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrWithOffset.first); }, in selectGlobalOffset()
3998 [=](MachineInstrBuilder &MIB) { MIB.addImm(PtrWithOffset.second); }, in selectGlobalOffset()
4007 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrWithOffset.first); }, in selectScratchOffset()
4008 [=](MachineInstrBuilder &MIB) { MIB.addImm(PtrWithOffset.second); }, in selectScratchOffset()
4053 [=](MachineInstrBuilder &MIB) { MIB.addReg(PtrBase); }, // saddr in selectGlobalSAddr()
4054 [=](MachineInstrBuilder &MIB) { in selectGlobalSAddr()
4057 [=](MachineInstrBuilder &MIB) { MIB.addImm(SplitImmOffset); }, in selectGlobalSAddr()
4089 return {{[=](MachineInstrBuilder &MIB) { // saddr in selectGlobalSAddr()
4092 [=](MachineInstrBuilder &MIB) { // voffset in selectGlobalSAddr()
4095 [=](MachineInstrBuilder &MIB) { // offset in selectGlobalSAddr()
4118 [=](MachineInstrBuilder &MIB) { MIB.addReg(AddrDef->Reg); }, // saddr in selectGlobalSAddr()
4119 [=](MachineInstrBuilder &MIB) { MIB.addReg(VOffset); }, // voffset in selectGlobalSAddr()
4120 [=](MachineInstrBuilder &MIB) { MIB.addImm(ImmOffset); } // offset in selectGlobalSAddr()
4146 [=](MachineInstrBuilder &MIB) { MIB.addFrameIndex(FI); }, // saddr in selectScratchSAddr()
4147 [=](MachineInstrBuilder &MIB) { MIB.addImm(ImmOffset); } // offset in selectScratchSAddr()
4177 [=](MachineInstrBuilder &MIB) { MIB.addReg(SAddr); }, // saddr in selectScratchSAddr()
4178 [=](MachineInstrBuilder &MIB) { MIB.addImm(ImmOffset); } // offset in selectScratchSAddr()
4234 [=](MachineInstrBuilder &MIB) { MIB.addReg(RHS); }, // vaddr in selectScratchSVAddr()
4235 [=](MachineInstrBuilder &MIB) { MIB.addFrameIndex(FI); }, // saddr in selectScratchSVAddr()
4236 [=](MachineInstrBuilder &MIB) { MIB.addImm(ImmOffset); } // offset in selectScratchSVAddr()
4244 [=](MachineInstrBuilder &MIB) { MIB.addReg(RHS); }, // vaddr in selectScratchSVAddr()
4245 [=](MachineInstrBuilder &MIB) { MIB.addReg(LHS); }, // saddr in selectScratchSVAddr()
4246 [=](MachineInstrBuilder &MIB) { MIB.addImm(ImmOffset); } // offset in selectScratchSVAddr()
4268 return {{[=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFScratchOffen()
4271 [=](MachineInstrBuilder &MIB) { // vaddr in selectMUBUFScratchOffen()
4274 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFScratchOffen()
4279 [=](MachineInstrBuilder &MIB) { // offset in selectMUBUFScratchOffen()
4310 return {{[=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFScratchOffen()
4313 [=](MachineInstrBuilder &MIB) { // vaddr in selectMUBUFScratchOffen()
4319 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFScratchOffen()
4324 [=](MachineInstrBuilder &MIB) { // offset in selectMUBUFScratchOffen()
4390 [=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFScratchOffset()
4393 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFScratchOffset()
4396 [=](MachineInstrBuilder &MIB) { MIB.addImm(0); } // offset in selectMUBUFScratchOffset()
4413 [=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFScratchOffset()
4416 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFScratchOffset()
4419 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); } // offset in selectMUBUFScratchOffset()
4428 [=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFScratchOffset()
4431 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFScratchOffset()
4434 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); } // offset in selectMUBUFScratchOffset()
4474 [=](MachineInstrBuilder &MIB) { MIB.addReg(Reg); }, in selectDS1Addr1Offset()
4475 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); } in selectDS1Addr1Offset()
4496 [=](MachineInstrBuilder &MIB) { MIB.addReg(Reg); }, in selectDSReadWrite2()
4497 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); }, in selectDSReadWrite2()
4498 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset+1); } in selectDSReadWrite2()
4553 static void addZeroImm(MachineInstrBuilder &MIB) { in addZeroImm()
4767 [=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFAddr64()
4770 [=](MachineInstrBuilder &MIB) { // vaddr in selectMUBUFAddr64()
4773 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFAddr64()
4779 [=](MachineInstrBuilder &MIB) { // offset in selectMUBUFAddr64()
4798 [=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFOffset()
4801 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFOffset()
4807 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); }, // offset in selectMUBUFOffset()
4827 [=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFAddr64Atomic()
4830 [=](MachineInstrBuilder &MIB) { // vaddr in selectMUBUFAddr64Atomic()
4833 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFAddr64Atomic()
4839 [=](MachineInstrBuilder &MIB) { // offset in selectMUBUFAddr64Atomic()
4842 [=](MachineInstrBuilder &MIB) { in selectMUBUFAddr64Atomic()
4858 [=](MachineInstrBuilder &MIB) { // rsrc in selectMUBUFOffsetAtomic()
4861 [=](MachineInstrBuilder &MIB) { // soffset in selectMUBUFOffsetAtomic()
4867 [=](MachineInstrBuilder &MIB) { MIB.addImm(Offset); }, // offset in selectMUBUFOffsetAtomic()
4868 [=](MachineInstrBuilder &MIB) { MIB.addImm(AMDGPU::CPol::GLC); } // cpol in selectMUBUFOffsetAtomic()
4893 return {{ [=](MachineInstrBuilder &MIB) { MIB.addImm(*EncodedImm); } }}; in selectSMRDBufferImm()
4909 return {{ [=](MachineInstrBuilder &MIB) { MIB.addImm(*EncodedImm); } }}; in selectSMRDBufferImm32()
4912 void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB, in renderTruncImm32()
4920 void AMDGPUInstructionSelector::renderNegateImm(MachineInstrBuilder &MIB, in renderNegateImm()
4928 void AMDGPUInstructionSelector::renderBitcastImm(MachineInstrBuilder &MIB, in renderBitcastImm()
4942 void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB, in renderPopcntImm()
4952 void AMDGPUInstructionSelector::renderTruncTImm(MachineInstrBuilder &MIB, in renderTruncTImm()
4958 void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB, in renderExtractCPol()
4965 void AMDGPUInstructionSelector::renderExtractSWZ(MachineInstrBuilder &MIB, in renderExtractSWZ()
4972 void AMDGPUInstructionSelector::renderSetGLC(MachineInstrBuilder &MIB, in renderSetGLC()
4979 void AMDGPUInstructionSelector::renderFrameIndex(MachineInstrBuilder &MIB, in renderFrameIndex()