Lines Matching refs:DstBank
536 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_MERGE_VALUES() local
539 TRI.getRegClassForSizeOnBank(DstSize, *DstBank); in selectG_MERGE_VALUES()
621 const RegisterBank *DstBank = RBI.getRegBank(Dst, *MRI, TRI); in selectG_BUILD_VECTOR_TRUNC() local
622 if (DstBank->getID() != AMDGPU::SGPRRegBankID) in selectG_BUILD_VECTOR_TRUNC()
753 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_INSERT() local
755 TRI.getRegClassForSizeOnBank(DstSize, *DstBank); in selectG_INSERT()
1211 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI); in selectRelocConstant() local
1212 const TargetRegisterClass *DstRC = TRI.getRegClassForSizeOnBank(32, *DstBank); in selectRelocConstant()
1216 const bool IsVALU = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectRelocConstant()
2087 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_SZA_EXT() local
2089 TRI.getRegClassForSizeOnBank(DstSize, *DstBank); in selectG_SZA_EXT()