Lines Matching refs:AddrDef
3285 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectGlobalLoadLds() local
3286 if (isSGPR(AddrDef->Reg)) { in selectGlobalLoadLds()
3287 Addr = AddrDef->Reg; in selectGlobalLoadLds()
3288 } else if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectGlobalLoadLds()
3290 getSrcRegIgnoringCopies(AddrDef->MI->getOperand(1).getReg(), *MRI); in selectGlobalLoadLds()
3292 Register PtrBaseOffset = AddrDef->MI->getOperand(2).getReg(); in selectGlobalLoadLds()
4077 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectGlobalSAddr() local
4078 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectGlobalSAddr()
4081 getSrcRegIgnoringCopies(AddrDef->MI->getOperand(1).getReg(), *MRI); in selectGlobalSAddr()
4084 Register PtrBaseOffset = AddrDef->MI->getOperand(2).getReg(); in selectGlobalSAddr()
4104 if (AddrDef->MI->getOpcode() == AMDGPU::G_IMPLICIT_DEF || in selectGlobalSAddr()
4105 AddrDef->MI->getOpcode() == AMDGPU::G_CONSTANT || !isSGPR(AddrDef->Reg)) in selectGlobalSAddr()
4118 [=](MachineInstrBuilder &MIB) { MIB.addReg(AddrDef->Reg); }, // saddr in selectGlobalSAddr()
4142 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectScratchSAddr() local
4143 if (AddrDef->MI->getOpcode() == AMDGPU::G_FRAME_INDEX) { in selectScratchSAddr()
4144 int FI = AddrDef->MI->getOperand(1).getIndex(); in selectScratchSAddr()
4151 Register SAddr = AddrDef->Reg; in selectScratchSAddr()
4153 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectScratchSAddr()
4154 Register LHS = AddrDef->MI->getOperand(1).getReg(); in selectScratchSAddr()
4155 Register RHS = AddrDef->MI->getOperand(2).getReg(); in selectScratchSAddr()
4217 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectScratchSVAddr() local
4218 if (AddrDef->MI->getOpcode() != AMDGPU::G_PTR_ADD) in selectScratchSVAddr()
4221 Register RHS = AddrDef->MI->getOperand(2).getReg(); in selectScratchSVAddr()
4225 Register LHS = AddrDef->MI->getOperand(1).getReg(); in selectScratchSVAddr()