47 AMDGPUInstructionSelector::AMDGPUInstructionSelector(  in AMDGPUInstructionSelector()  function in AMDGPUInstructionSelector
62 const char *AMDGPUInstructionSelector::getName() { return DEBUG_TYPE; }  in getName()
64 void AMDGPUInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,  in setupMF()
73 bool AMDGPUInstructionSelector::isVCC(Register Reg,  in isVCC()
95 bool AMDGPUInstructionSelector::constrainCopyLikeIntrin(MachineInstr &MI,  in constrainCopyLikeIntrin()
119 bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {  in selectCOPY()
197 bool AMDGPUInstructionSelector::selectPHI(MachineInstr &I) const {  in selectPHI()
236 AMDGPUInstructionSelector::getSubOperand64(MachineOperand &MO,  in getSubOperand64()
283 bool AMDGPUInstructionSelector::selectG_AND_OR_XOR(MachineInstr &I) const {  in selectG_AND_OR_XOR()
304 bool AMDGPUInstructionSelector::selectG_ADD_SUB(MachineInstr &I) const {  in selectG_ADD_SUB()
405 bool AMDGPUInstructionSelector::selectG_UADDO_USUBO_UADDE_USUBE(  in selectG_UADDO_USUBO_UADDE_USUBE()
461 bool AMDGPUInstructionSelector::selectG_AMDGPU_MAD_64_32(  in selectG_AMDGPU_MAD_64_32()
480 bool AMDGPUInstructionSelector::selectG_EXTRACT(MachineInstr &I) const {  in selectG_EXTRACT()
525 bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {  in selectG_MERGE_VALUES()
564 bool AMDGPUInstructionSelector::selectG_UNMERGE_VALUES(MachineInstr &MI) const {  in selectG_UNMERGE_VALUES()
609 bool AMDGPUInstructionSelector::selectG_BUILD_VECTOR_TRUNC(  in selectG_BUILD_VECTOR_TRUNC()
709 bool AMDGPUInstructionSelector::selectG_PTR_ADD(MachineInstr &I) const {  in selectG_PTR_ADD()
713 bool AMDGPUInstructionSelector::selectG_IMPLICIT_DEF(MachineInstr &I) const {  in selectG_IMPLICIT_DEF()
728 bool AMDGPUInstructionSelector::selectG_INSERT(MachineInstr &I) const {  in selectG_INSERT()
787 bool AMDGPUInstructionSelector::selectG_SBFX_UBFX(MachineInstr &MI) const {  in selectG_SBFX_UBFX()
811 bool AMDGPUInstructionSelector::selectInterpP1F16(MachineInstr &MI) const {  in selectInterpP1F16()
861 bool AMDGPUInstructionSelector::selectWritelane(MachineInstr &MI) const {  in selectWritelane()
915 bool AMDGPUInstructionSelector::selectDivScale(MachineInstr &MI) const {  in selectDivScale()
954 bool AMDGPUInstructionSelector::selectG_INTRINSIC(MachineInstr &I) const {  in selectG_INTRINSIC()
1052 int AMDGPUInstructionSelector::getS_CMPOpcode(CmpInst::Predicate P,  in getS_CMPOpcode()
1097 bool AMDGPUInstructionSelector::selectG_ICMP(MachineInstr &I) const {  in selectG_ICMP()
1138 bool AMDGPUInstructionSelector::selectIntrinsicIcmp(MachineInstr &I) const {  in selectIntrinsicIcmp()
1177 bool AMDGPUInstructionSelector::selectBallot(MachineInstr &I) const {  in selectBallot()
1209 bool AMDGPUInstructionSelector::selectRelocConstant(MachineInstr &I) const {  in selectRelocConstant()
1233 bool AMDGPUInstructionSelector::selectGroupStaticSize(MachineInstr &I) const {  in selectGroupStaticSize()
1260 bool AMDGPUInstructionSelector::selectReturnAddress(MachineInstr &I) const {  in selectReturnAddress()
1298 bool AMDGPUInstructionSelector::selectEndCfIntrinsic(MachineInstr &MI) const {  in selectEndCfIntrinsic()
1313 bool AMDGPUInstructionSelector::selectDSOrderedIntrinsic(  in selectDSOrderedIntrinsic()
1396 bool AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,  in selectDSGWSIntrinsic()
1488 bool AMDGPUInstructionSelector::selectDSAppendConsume(MachineInstr &MI,  in selectDSAppendConsume()
1520 bool AMDGPUInstructionSelector::selectSBarrier(MachineInstr &MI) const {  in selectSBarrier()
1547 bool AMDGPUInstructionSelector::selectImageIntrinsic(  in selectImageIntrinsic()
1806 bool AMDGPUInstructionSelector::selectG_INTRINSIC_W_SIDE_EFFECTS(  in selectG_INTRINSIC_W_SIDE_EFFECTS()
1848 bool AMDGPUInstructionSelector::selectG_SELECT(MachineInstr &I) const {  in selectG_SELECT()
1920 bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {  in selectG_TRUNC()
2048 const RegisterBank *AMDGPUInstructionSelector::getArtifactRegBank(  in getArtifactRegBank()
2061 bool AMDGPUInstructionSelector::selectG_SZA_EXT(MachineInstr &I) const {  in selectG_SZA_EXT()
2186 bool AMDGPUInstructionSelector::selectG_CONSTANT(MachineInstr &I) const {  in selectG_CONSTANT()
2261 bool AMDGPUInstructionSelector::selectG_FNEG(MachineInstr &MI) const {  in selectG_FNEG()
2317 bool AMDGPUInstructionSelector::selectG_FABS(MachineInstr &MI) const {  in selectG_FABS()
2362 void AMDGPUInstructionSelector::getAddrModeInfo(const MachineInstr &Load,  in getAddrModeInfo()
2396 bool AMDGPUInstructionSelector::isSGPR(Register Reg) const {  in isSGPR()
2400 bool AMDGPUInstructionSelector::isInstrUniform(const MachineInstr &MI) const {  in isInstrUniform()
2422 bool AMDGPUInstructionSelector::hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const {  in hasVgprParts()
2430 void AMDGPUInstructionSelector::initM0(MachineInstr &I) const {  in initM0()
2443 bool AMDGPUInstructionSelector::selectG_LOAD_STORE_ATOMICRMW(  in selectG_LOAD_STORE_ATOMICRMW()
2477 bool AMDGPUInstructionSelector::selectG_BRCOND(MachineInstr &I) const {  in selectG_BRCOND()
2533 bool AMDGPUInstructionSelector::selectG_GLOBAL_VALUE(  in selectG_GLOBAL_VALUE()
2546 bool AMDGPUInstructionSelector::selectG_PTRMASK(MachineInstr &I) const {  in selectG_PTRMASK()
2682 bool AMDGPUInstructionSelector::selectG_EXTRACT_VECTOR_ELT(  in selectG_EXTRACT_VECTOR_ELT()
2759 bool AMDGPUInstructionSelector::selectG_INSERT_VECTOR_ELT(  in selectG_INSERT_VECTOR_ELT()
2863 bool AMDGPUInstructionSelector::selectG_SHUFFLE_VECTOR(  in selectG_SHUFFLE_VECTOR()
3018 bool AMDGPUInstructionSelector::selectAMDGPU_BUFFER_ATOMIC_FADD(  in selectAMDGPU_BUFFER_ATOMIC_FADD()
3105 bool AMDGPUInstructionSelector::selectGlobalAtomicFadd(  in selectGlobalAtomicFadd()
3145 bool AMDGPUInstructionSelector::selectBufferLoadLds(MachineInstr &MI) const {  in selectBufferLoadLds()
3257 bool AMDGPUInstructionSelector::selectGlobalLoadLds(MachineInstr &MI) const{  in selectGlobalLoadLds()
3339 bool AMDGPUInstructionSelector::selectBVHIntrinsic(MachineInstr &MI) const{  in selectBVHIntrinsic()
3346 bool AMDGPUInstructionSelector::selectSMFMACIntrin(MachineInstr &MI) const {  in selectSMFMACIntrin()
3405 bool AMDGPUInstructionSelector::selectWaveAddress(MachineInstr &MI) const {  in selectWaveAddress()
3432 bool AMDGPUInstructionSelector::select(MachineInstr &I) {  in select()
3573 AMDGPUInstructionSelector::selectVCSRC(MachineOperand &Root) const {  in selectVCSRC()
3580 std::pair<Register, unsigned> AMDGPUInstructionSelector::selectVOP3ModsImpl(  in selectVOP3ModsImpl()
3622 AMDGPUInstructionSelector::selectVSRC0(MachineOperand &Root) const {  in selectVSRC0()
3629 AMDGPUInstructionSelector::selectVOP3Mods0(MachineOperand &Root) const {  in selectVOP3Mods0()
3643 AMDGPUInstructionSelector::selectVOP3BMods0(MachineOperand &Root) const {  in selectVOP3BMods0()
3657 AMDGPUInstructionSelector::selectVOP3OMods(MachineOperand &Root) const {  in selectVOP3OMods()
3666 AMDGPUInstructionSelector::selectVOP3Mods(MachineOperand &Root) const {  in selectVOP3Mods()
3678 AMDGPUInstructionSelector::selectVOP3BMods(MachineOperand &Root) const {  in selectVOP3BMods()
3690 AMDGPUInstructionSelector::selectVOP3NoMods(MachineOperand &Root) const {  in selectVOP3NoMods()
3702 AMDGPUInstructionSelector::selectVOP3PModsImpl(  in selectVOP3PModsImpl()
3726 AMDGPUInstructionSelector::selectVOP3PMods(MachineOperand &Root) const {  in selectVOP3PMods()
3741 AMDGPUInstructionSelector::selectVOP3PModsDOT(MachineOperand &Root) const {  in selectVOP3PModsDOT()
3756 AMDGPUInstructionSelector::selectDotIUVOP3PMods(MachineOperand &Root) const {  in selectDotIUVOP3PMods()
3771 AMDGPUInstructionSelector::selectWMMAOpSelVOP3PMods(  in selectWMMAOpSelVOP3PMods()
3785 AMDGPUInstructionSelector::selectVOP3Mods_nnan(MachineOperand &Root) const {  in selectVOP3Mods_nnan()
3799 AMDGPUInstructionSelector::selectVOP3OpSelMods(MachineOperand &Root) const {  in selectVOP3OpSelMods()
3808 AMDGPUInstructionSelector::selectVINTERPMods(MachineOperand &Root) const {  in selectVINTERPMods()
3823 AMDGPUInstructionSelector::selectVINTERPModsHi(MachineOperand &Root) const {  in selectVINTERPModsHi()
3837 bool AMDGPUInstructionSelector::selectSmrdOffset(MachineOperand &Root,  in selectSmrdOffset()
3905 AMDGPUInstructionSelector::selectSmrdImm(MachineOperand &Root) const {  in selectSmrdImm()
3916 AMDGPUInstructionSelector::selectSmrdImm32(MachineOperand &Root) const {  in selectSmrdImm32()
3937 AMDGPUInstructionSelector::selectSmrdSgpr(MachineOperand &Root) const {  in selectSmrdSgpr()
3947 AMDGPUInstructionSelector::selectSmrdSgprImm(MachineOperand &Root) const {  in selectSmrdSgprImm()
3959 AMDGPUInstructionSelector::selectFlatOffsetImpl(MachineOperand &Root,  in selectFlatOffsetImpl()
3983 AMDGPUInstructionSelector::selectFlatOffset(MachineOperand &Root) const {  in selectFlatOffset()
3993 AMDGPUInstructionSelector::selectGlobalOffset(MachineOperand &Root) const {  in selectGlobalOffset()
4003 AMDGPUInstructionSelector::selectScratchOffset(MachineOperand &Root) const {  in selectScratchOffset()
4014 AMDGPUInstructionSelector::selectGlobalSAddr(MachineOperand &Root) const {  in selectGlobalSAddr()
4125 AMDGPUInstructionSelector::selectScratchSAddr(MachineOperand &Root) const {  in selectScratchSAddr()
4183 bool AMDGPUInstructionSelector::checkFlatScratchSVSSwizzleBug(  in checkFlatScratchSVSSwizzleBug()
4201 AMDGPUInstructionSelector::selectScratchSVAddr(MachineOperand &Root) const {  in selectScratchSVAddr()
4251 AMDGPUInstructionSelector::selectMUBUFScratchOffen(MachineOperand &Root) const {  in selectMUBUFScratchOffen()
4329 bool AMDGPUInstructionSelector::isDSOffsetLegal(Register Base,  in isDSOffsetLegal()
4342 bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0,  in isDSOffset2Legal()
4358 bool AMDGPUInstructionSelector::isUnneededShiftMask(const MachineInstr &MI,  in isUnneededShiftMask()
4382 AMDGPUInstructionSelector::selectMUBUFScratchOffset(  in selectMUBUFScratchOffset()
4439 AMDGPUInstructionSelector::selectDS1Addr1OffsetImpl(MachineOperand &Root) const {  in selectDS1Addr1OffsetImpl()
4469 AMDGPUInstructionSelector::selectDS1Addr1Offset(MachineOperand &Root) const {  in selectDS1Addr1Offset()
4480 AMDGPUInstructionSelector::selectDS64Bit4ByteAligned(MachineOperand &Root) const {  in selectDS64Bit4ByteAligned()
4485 AMDGPUInstructionSelector::selectDS128Bit8ByteAligned(MachineOperand &Root) const {  in selectDS128Bit8ByteAligned()
4490 AMDGPUInstructionSelector::selectDSReadWrite2(MachineOperand &Root,  in selectDSReadWrite2()
4503 AMDGPUInstructionSelector::selectDSReadWrite2Impl(MachineOperand &Root,  in selectDSReadWrite2Impl()
4539 AMDGPUInstructionSelector::getPtrBaseWithConstantOffset(  in getPtrBaseWithConstantOffset()
4620 AMDGPUInstructionSelector::MUBUFAddressData
4621 AMDGPUInstructionSelector::parseMUBUFAddress(Register Src) const {  in parseMUBUFAddress()
4652 bool AMDGPUInstructionSelector::shouldUseAddr64(MUBUFAddressData Addr) const {  in shouldUseAddr64()
4665 void AMDGPUInstructionSelector::splitIllegalMUBUFOffset(  in splitIllegalMUBUFOffset()
4678 bool AMDGPUInstructionSelector::selectMUBUFAddr64Impl(  in selectMUBUFAddr64Impl()
4729 bool AMDGPUInstructionSelector::selectMUBUFOffsetImpl(  in selectMUBUFOffsetImpl()
4755 AMDGPUInstructionSelector::selectMUBUFAddr64(MachineOperand &Root) const {  in selectMUBUFAddr64()
4789 AMDGPUInstructionSelector::selectMUBUFOffset(MachineOperand &Root) const {  in selectMUBUFOffset()
4815 AMDGPUInstructionSelector::selectMUBUFAddr64Atomic(MachineOperand &Root) const {  in selectMUBUFAddr64Atomic()
4849 AMDGPUInstructionSelector::selectMUBUFOffsetAtomic(MachineOperand &Root) const {  in selectMUBUFOffsetAtomic()
4883 AMDGPUInstructionSelector::selectSMRDBufferImm(MachineOperand &Root) const {  in selectSMRDBufferImm()
4897 AMDGPUInstructionSelector::selectSMRDBufferImm32(MachineOperand &Root) const {  in selectSMRDBufferImm32()
4912 void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB,  in renderTruncImm32()
4920 void AMDGPUInstructionSelector::renderNegateImm(MachineInstrBuilder &MIB,  in renderNegateImm()
4928 void AMDGPUInstructionSelector::renderBitcastImm(MachineInstrBuilder &MIB,  in renderBitcastImm()
4942 void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB,  in renderPopcntImm()
4952 void AMDGPUInstructionSelector::renderTruncTImm(MachineInstrBuilder &MIB,  in renderTruncTImm()
4958 void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB,  in renderExtractCPol()
4965 void AMDGPUInstructionSelector::renderExtractSWZ(MachineInstrBuilder &MIB,  in renderExtractSWZ()
4972 void AMDGPUInstructionSelector::renderSetGLC(MachineInstrBuilder &MIB,  in renderSetGLC()
4979 void AMDGPUInstructionSelector::renderFrameIndex(MachineInstrBuilder &MIB,  in renderFrameIndex()
4985 bool AMDGPUInstructionSelector::isInlineImmediate16(int64_t Imm) const {  in isInlineImmediate16()
4989 bool AMDGPUInstructionSelector::isInlineImmediate32(int64_t Imm) const {  in isInlineImmediate32()
4993 bool AMDGPUInstructionSelector::isInlineImmediate64(int64_t Imm) const {  in isInlineImmediate64()
4997 bool AMDGPUInstructionSelector::isInlineImmediate(const APFloat &Imm) const {  in isInlineImmediate()