Lines Matching refs:SDLoc
35 SDValue getFFBX_U32(SelectionDAG &DAG, SDValue Op, const SDLoc &DL, unsigned Opc) const;
86 SDValue splitBinaryBitConstantOpImpl(DAGCombinerInfo &DCI, const SDLoc &SL,
97 SDValue performCtlz_CttzCombine(const SDLoc &SL, SDValue Cond, SDValue LHS,
124 std::pair<SDValue, SDValue> splitVector(const SDValue &N, const SDLoc &DL,
205 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
228 SDValue combineFMinMaxLegacy(const SDLoc &DL, EVT VT, SDValue LHS,
288 const SDLoc &SL,
293 return CreateLiveInRegister(DAG, RC, Reg, VT, SDLoc(DAG.getEntryNode())); in CreateLiveInRegister()
300 return CreateLiveInRegister(DAG, RC, Reg, VT, SDLoc(DAG.getEntryNode()), true); in CreateLiveInRegisterRaw()
307 const SDLoc &SL,
311 const SDLoc &SL,
318 EVT VT, const SDLoc &SL,