70 class AMDGPUCodeGenPrepare : public FunctionPass,  class
71                              public InstVisitor<AMDGPUCodeGenPrepare, bool> {
205   AMDGPUCodeGenPrepare() : FunctionPass(ID) {}  in AMDGPUCodeGenPrepare()  function in __anondc492a450111::AMDGPUCodeGenPrepare
236 unsigned AMDGPUCodeGenPrepare::getBaseElementBitWidth(const Type *T) const {  in getBaseElementBitWidth()
244 Type *AMDGPUCodeGenPrepare::getI32Ty(IRBuilder<> &B, const Type *T) const {  in getI32Ty()
252 bool AMDGPUCodeGenPrepare::isSigned(const BinaryOperator &I) const {  in isSigned()
257 bool AMDGPUCodeGenPrepare::isSigned(const SelectInst &I) const {  in isSigned()
262 bool AMDGPUCodeGenPrepare::needsPromotionToI32(const Type *T) const {  in needsPromotionToI32()
310 bool AMDGPUCodeGenPrepare::canWidenScalarExtLoad(LoadInst &I) const {  in canWidenScalarExtLoad()
319 bool AMDGPUCodeGenPrepare::promoteUniformOpToI32(BinaryOperator &I) const {  in promoteUniformOpToI32()
366 bool AMDGPUCodeGenPrepare::promoteUniformOpToI32(ICmpInst &I) const {  in promoteUniformOpToI32()
393 bool AMDGPUCodeGenPrepare::promoteUniformOpToI32(SelectInst &I) const {  in promoteUniformOpToI32()
422 bool AMDGPUCodeGenPrepare::promoteUniformBitreverseToI32(  in promoteUniformBitreverseToI32()
448 unsigned AMDGPUCodeGenPrepare::numBitsUnsigned(Value *Op) const {  in numBitsUnsigned()
452 unsigned AMDGPUCodeGenPrepare::numBitsSigned(Value *Op) const {  in numBitsSigned()
509 bool AMDGPUCodeGenPrepare::replaceMulWithMul24(BinaryOperator &I) const {  in replaceMulWithMul24()
593 bool AMDGPUCodeGenPrepare::foldBinOpIntoSelect(BinaryOperator &BO) const {  in foldBinOpIntoSelect()
760 bool AMDGPUCodeGenPrepare::visitFDiv(BinaryOperator &FDiv) {  in visitFDiv()
832 bool AMDGPUCodeGenPrepare::visitXor(BinaryOperator &I) {  in visitXor()
883 int AMDGPUCodeGenPrepare::getDivNumBits(BinaryOperator &I,  in getDivNumBits()
904 Value *AMDGPUCodeGenPrepare::expandDivRem24(IRBuilder<> &Builder,  in expandDivRem24()
914 Value *AMDGPUCodeGenPrepare::expandDivRem24Impl(IRBuilder<> &Builder,  in expandDivRem24Impl()
1018 bool AMDGPUCodeGenPrepare::divHasSpecialOptimization(  in divHasSpecialOptimization()
1060 Value *AMDGPUCodeGenPrepare::expandDivRem32(IRBuilder<> &Builder,  in expandDivRem32()
1185 Value *AMDGPUCodeGenPrepare::shrinkDivRem64(IRBuilder<> &Builder,  in shrinkDivRem64()
1216 void AMDGPUCodeGenPrepare::expandDivRem64(BinaryOperator &I) const {  in expandDivRem64()
1232 bool AMDGPUCodeGenPrepare::visitBinaryOperator(BinaryOperator &I) {  in visitBinaryOperator()
1315 bool AMDGPUCodeGenPrepare::visitLoadInst(LoadInst &I) {  in visitLoadInst()
1363 bool AMDGPUCodeGenPrepare::visitICmpInst(ICmpInst &I) {  in visitICmpInst()
1373 bool AMDGPUCodeGenPrepare::visitSelectInst(SelectInst &I) {  in visitSelectInst()
1383 bool AMDGPUCodeGenPrepare::visitIntrinsicInst(IntrinsicInst &I) {  in visitIntrinsicInst()
1392 bool AMDGPUCodeGenPrepare::visitBitreverseIntrinsicInst(IntrinsicInst &I) {  in visitBitreverseIntrinsicInst()
1402 bool AMDGPUCodeGenPrepare::doInitialization(Module &M) {  in doInitialization()
1408 bool AMDGPUCodeGenPrepare::runOnFunction(Function &F) {  in runOnFunction()
1456 INITIALIZE_PASS_BEGIN(AMDGPUCodeGenPrepare, DEBUG_TYPE,
1460 INITIALIZE_PASS_END(AMDGPUCodeGenPrepare, DEBUG_TYPE, "AMDGPU IR optimizations",
1463 char AMDGPUCodeGenPrepare::ID = 0;
1466   return new AMDGPUCodeGenPrepare();  in createAMDGPUCodeGenPreparePass()