Lines Matching refs:CallConv
267 CallingConv::ID CallConv, in canLowerReturn() argument
271 if (AMDGPU::isEntryFunctionCC(CallConv)) in canLowerReturn()
276 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn()
279 return checkReturn(CCInfo, Outs, TLI.CCAssignFnForReturn(CallConv, IsVarArg)); in canLowerReturn()
979 CallingConv::ID CalleeCC = Info.CallConv; in doCallerAndCalleePassArgsTheSameWay()
1025 CallingConv::ID CalleeCC = Info.CallConv; in areCalleeOutgoingArgsTailCallable()
1088 CallingConv::ID CalleeCC = Info.CallConv; in isEligibleForTailCallOptimization()
1167 CallingConv::ID CalleeCC = Info.CallConv; in lowerTailCall()
1233 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerTailCall()
1240 if (Info.CallConv != CallingConv::AMDGPU_Gfx) { in lowerTailCall()
1308 splitToValueTypes(OrigArg, OutArgs, DL, Info.CallConv); in lowerCall()
1312 splitToValueTypes(Info.OrigRet, InArgs, DL, Info.CallConv); in lowerCall()
1332 getAssignFnsForCC(Info.CallConv, TLI); in lowerCall()
1349 const uint32_t *Mask = TRI->getCallPreservedMask(MF, Info.CallConv); in lowerCall()
1353 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerCall()
1360 if (Info.CallConv != CallingConv::AMDGPU_Gfx) { in lowerCall()
1404 CCAssignFn *RetAssignFn = TLI.CCAssignFnForReturn(Info.CallConv, in lowerCall()
1409 Info.CallConv, Info.IsVarArg)) in lowerCall()