Lines Matching refs:OpNum
742 int OpNum = LdStDesc->ListOperand; in printInst() local
743 printVectorList(MI, OpNum++, STI, O, ""); in printInst()
746 O << '[' << MI->getOperand(OpNum++).getImm() << ']'; in printInst()
749 unsigned AddrReg = MI->getOperand(OpNum++).getReg(); in printInst()
754 unsigned Reg = MI->getOperand(OpNum++).getReg(); in printInst()
884 void AArch64InstPrinter::printMatrix(const MCInst *MI, unsigned OpNum, in printMatrix() argument
887 const MCOperand &RegOp = MI->getOperand(OpNum); in printMatrix()
915 void AArch64InstPrinter::printMatrixTileVector(const MCInst *MI, unsigned OpNum, in printMatrixTileVector() argument
918 const MCOperand &RegOp = MI->getOperand(OpNum); in printMatrixTileVector()
928 void AArch64InstPrinter::printMatrixTile(const MCInst *MI, unsigned OpNum, in printMatrixTile() argument
931 const MCOperand &RegOp = MI->getOperand(OpNum); in printMatrixTile()
936 void AArch64InstPrinter::printSVCROp(const MCInst *MI, unsigned OpNum, in printSVCROp() argument
939 const MCOperand &MO = MI->getOperand(OpNum); in printSVCROp()
1019 void AArch64InstPrinter::printAddSubImm(const MCInst *MI, unsigned OpNum, in printAddSubImm() argument
1022 const MCOperand &MO = MI->getOperand(OpNum); in printAddSubImm()
1027 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm()); in printAddSubImm()
1030 printShifter(MI, OpNum + 1, STI, O); in printAddSubImm()
1037 printShifter(MI, OpNum + 1, STI, O); in printAddSubImm()
1042 void AArch64InstPrinter::printLogicalImm(const MCInst *MI, unsigned OpNum, in printLogicalImm() argument
1045 uint64_t Val = MI->getOperand(OpNum).getImm(); in printLogicalImm()
1050 void AArch64InstPrinter::printShifter(const MCInst *MI, unsigned OpNum, in printShifter() argument
1053 unsigned Val = MI->getOperand(OpNum).getImm(); in printShifter()
1062 void AArch64InstPrinter::printShiftedRegister(const MCInst *MI, unsigned OpNum, in printShiftedRegister() argument
1065 O << getRegisterName(MI->getOperand(OpNum).getReg()); in printShiftedRegister()
1066 printShifter(MI, OpNum + 1, STI, O); in printShiftedRegister()
1069 void AArch64InstPrinter::printExtendedRegister(const MCInst *MI, unsigned OpNum, in printExtendedRegister() argument
1072 O << getRegisterName(MI->getOperand(OpNum).getReg()); in printExtendedRegister()
1073 printArithExtend(MI, OpNum + 1, STI, O); in printExtendedRegister()
1076 void AArch64InstPrinter::printArithExtend(const MCInst *MI, unsigned OpNum, in printArithExtend() argument
1079 unsigned Val = MI->getOperand(OpNum).getImm(); in printArithExtend()
1117 void AArch64InstPrinter::printMemExtend(const MCInst *MI, unsigned OpNum, in printMemExtend() argument
1120 bool SignExtend = MI->getOperand(OpNum).getImm(); in printMemExtend()
1121 bool DoShift = MI->getOperand(OpNum + 1).getImm(); in printMemExtend()
1127 unsigned OpNum, in printRegWithShiftExtend() argument
1130 printOperand(MI, OpNum, STI, O); in printRegWithShiftExtend()
1143 void AArch64InstPrinter::printCondCode(const MCInst *MI, unsigned OpNum, in printCondCode() argument
1146 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printCondCode()
1150 void AArch64InstPrinter::printInverseCondCode(const MCInst *MI, unsigned OpNum, in printInverseCondCode() argument
1153 AArch64CC::CondCode CC = (AArch64CC::CondCode)MI->getOperand(OpNum).getImm(); in printInverseCondCode()
1157 void AArch64InstPrinter::printAMNoIndex(const MCInst *MI, unsigned OpNum, in printAMNoIndex() argument
1160 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()) << ']'; in printAMNoIndex()
1164 void AArch64InstPrinter::printImmScale(const MCInst *MI, unsigned OpNum, in printImmScale() argument
1167 O << '#' << formatImm(Scale * MI->getOperand(OpNum).getImm()); in printImmScale()
1170 void AArch64InstPrinter::printUImm12Offset(const MCInst *MI, unsigned OpNum, in printUImm12Offset() argument
1172 const MCOperand MO = MI->getOperand(OpNum); in printUImm12Offset()
1181 void AArch64InstPrinter::printAMIndexedWB(const MCInst *MI, unsigned OpNum, in printAMIndexedWB() argument
1183 const MCOperand MO1 = MI->getOperand(OpNum + 1); in printAMIndexedWB()
1184 O << '[' << getRegisterName(MI->getOperand(OpNum).getReg()); in printAMIndexedWB()
1196 void AArch64InstPrinter::printPrefetchOp(const MCInst *MI, unsigned OpNum, in printPrefetchOp() argument
1199 unsigned prfop = MI->getOperand(OpNum).getImm(); in printPrefetchOp()
1213 void AArch64InstPrinter::printPSBHintOp(const MCInst *MI, unsigned OpNum, in printPSBHintOp() argument
1216 unsigned psbhintop = MI->getOperand(OpNum).getImm(); in printPSBHintOp()
1224 void AArch64InstPrinter::printBTIHintOp(const MCInst *MI, unsigned OpNum, in printBTIHintOp() argument
1227 unsigned btihintop = MI->getOperand(OpNum).getImm() ^ 32; in printBTIHintOp()
1235 void AArch64InstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum, in printFPImmOperand() argument
1238 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1328 unsigned OpNum, in printGPRSeqPairsClassOperand() argument
1333 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRSeqPairsClassOperand()
1343 void AArch64InstPrinter::printMatrixTileList(const MCInst *MI, unsigned OpNum, in printMatrixTileList() argument
1347 unsigned RegMask = MI->getOperand(OpNum).getImm(); in printMatrixTileList()
1368 void AArch64InstPrinter::printVectorList(const MCInst *MI, unsigned OpNum, in printVectorList() argument
1372 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorList()
1423 unsigned OpNum, in printImplicitlyTypedVectorList() argument
1426 printVectorList(MI, OpNum, STI, O, ""); in printImplicitlyTypedVectorList()
1430 void AArch64InstPrinter::printTypedVectorList(const MCInst *MI, unsigned OpNum, in printTypedVectorList() argument
1439 printVectorList(MI, OpNum, STI, O, Suffix); in printTypedVectorList()
1442 void AArch64InstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum, in printVectorIndex() argument
1445 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1448 void AArch64InstPrinter::printMatrixIndex(const MCInst *MI, unsigned OpNum, in printMatrixIndex() argument
1451 O << MI->getOperand(OpNum).getImm(); in printMatrixIndex()
1455 unsigned OpNum, in printAlignedLabel() argument
1458 const MCOperand &Op = MI->getOperand(OpNum); in printAlignedLabel()
1473 dyn_cast<MCConstantExpr>(MI->getOperand(OpNum).getExpr()); in printAlignedLabel()
1479 MI->getOperand(OpNum).getExpr()->print(O, &MAI); in printAlignedLabel()
1484 unsigned OpNum, in printAdrpLabel() argument
1487 const MCOperand &Op = MI->getOperand(OpNum); in printAdrpLabel()
1501 MI->getOperand(OpNum).getExpr()->print(O, &MAI); in printAdrpLabel()
1647 void AArch64InstPrinter::printSVEPattern(const MCInst *MI, unsigned OpNum, in printSVEPattern() argument
1650 unsigned Val = MI->getOperand(OpNum).getImm(); in printSVEPattern()
1658 void AArch64InstPrinter::printSVERegOp(const MCInst *MI, unsigned OpNum, in printSVERegOp() argument
1672 unsigned Reg = MI->getOperand(OpNum).getReg(); in printSVERegOp()
1697 void AArch64InstPrinter::printImm8OptLsl(const MCInst *MI, unsigned OpNum, in printImm8OptLsl() argument
1700 unsigned UnscaledVal = MI->getOperand(OpNum).getImm(); in printImm8OptLsl()
1701 unsigned Shift = MI->getOperand(OpNum + 1).getImm(); in printImm8OptLsl()
1708 printShifter(MI, OpNum + 1, STI, O); in printImm8OptLsl()
1722 void AArch64InstPrinter::printSVELogicalImm(const MCInst *MI, unsigned OpNum, in printSVELogicalImm() argument
1728 uint64_t Val = MI->getOperand(OpNum).getImm(); in printSVELogicalImm()
1741 void AArch64InstPrinter::printZPRasFPR(const MCInst *MI, unsigned OpNum, in printZPRasFPR() argument
1754 unsigned Reg = MI->getOperand(OpNum).getReg(); in printZPRasFPR()
1759 void AArch64InstPrinter::printExactFPImm(const MCInst *MI, unsigned OpNum, in printExactFPImm() argument
1764 unsigned Val = MI->getOperand(OpNum).getImm(); in printExactFPImm()
1768 void AArch64InstPrinter::printGPR64as32(const MCInst *MI, unsigned OpNum, in printGPR64as32() argument
1771 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPR64as32()
1775 void AArch64InstPrinter::printGPR64x8(const MCInst *MI, unsigned OpNum, in printGPR64x8() argument
1778 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPR64x8()