Lines Matching refs:buildInstr
399 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, MatchInfo.SrcOps); in applyShuffleVectorPseudo()
412 MIRBuilder.buildInstr(MatchInfo.Opc, {MatchInfo.Dst}, in applyEXT()
507 MIB.buildInstr(NewOpc, {MI.getOperand(0)}, {MI.getOperand(1), ImmDef}); in applyVAshrLshrImm()
717 B.buildInstr(MatchInfo.first, {MI.getOperand(0).getReg()}, {DupSrc, Lane}); in applyDupLane()
739 B.buildInstr(AArch64::G_DUP, {MI.getOperand(0).getReg()}, in applyBuildVectorToDup()
868 ? MIB.buildInstr(AArch64::G_FCMEQZ, {DstTy}, {LHS}) in getVectorFCMP()
869 : MIB.buildInstr(AArch64::G_FCMEQ, {DstTy}, {LHS, RHS}); in getVectorFCMP()
875 ? MIB.buildInstr(AArch64::G_FCMEQZ, {DstTy}, {LHS}).getReg(0) in getVectorFCMP()
876 : MIB.buildInstr(AArch64::G_FCMEQ, {DstTy}, {LHS, RHS}) in getVectorFCMP()
882 ? MIB.buildInstr(AArch64::G_FCMGEZ, {DstTy}, {LHS}).getReg(0) in getVectorFCMP()
883 : MIB.buildInstr(AArch64::G_FCMGE, {DstTy}, {LHS, RHS}) in getVectorFCMP()
889 ? MIB.buildInstr(AArch64::G_FCMGTZ, {DstTy}, {LHS}).getReg(0) in getVectorFCMP()
890 : MIB.buildInstr(AArch64::G_FCMGT, {DstTy}, {LHS, RHS}) in getVectorFCMP()
896 ? MIB.buildInstr(AArch64::G_FCMLEZ, {DstTy}, {LHS}).getReg(0) in getVectorFCMP()
897 : MIB.buildInstr(AArch64::G_FCMGE, {DstTy}, {RHS, LHS}) in getVectorFCMP()
903 ? MIB.buildInstr(AArch64::G_FCMLTZ, {DstTy}, {LHS}).getReg(0) in getVectorFCMP()
904 : MIB.buildInstr(AArch64::G_FCMGT, {DstTy}, {RHS, LHS}) in getVectorFCMP()