54     MachineInstr &MI, MachineRegisterInfo &MRI,  in matchExtractVecEltPairwiseAdd()  argument
58   LLT DstTy = MRI.getType(MI.getOperand(0).getReg());  in matchExtractVecEltPairwiseAdd()
60   auto Cst = getIConstantVRegValWithLookThrough(Src2, MRI);  in matchExtractVecEltPairwiseAdd()
66   auto *FAddMI = getOpcodeDef(TargetOpcode::G_FADD, Src1, MRI);  in matchExtractVecEltPairwiseAdd()
78       getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op2, MRI);  in matchExtractVecEltPairwiseAdd()
79   MachineInstr *Other = MRI.getVRegDef(Src1Op1);  in matchExtractVecEltPairwiseAdd()
81     Shuffle = getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op1, MRI);  in matchExtractVecEltPairwiseAdd()
82     Other = MRI.getVRegDef(Src1Op2);  in matchExtractVecEltPairwiseAdd()
87       Other == MRI.getVRegDef(Shuffle->getOperand(1).getReg())) {  in matchExtractVecEltPairwiseAdd()
97     MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,  in applyExtractVecEltPairwiseAdd()  argument
113 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) {  in isSignExtended()  argument
115   unsigned Opc = MRI.getVRegDef(R)->getOpcode();  in isSignExtended()
119 static bool isZeroExtended(Register R, MachineRegisterInfo &MRI) {  in isZeroExtended()  argument
121   return MRI.getVRegDef(R)->getOpcode() == TargetOpcode::G_ZEXT;  in isZeroExtended()
125     MachineInstr &MI, MachineRegisterInfo &MRI,  in matchAArch64MulConstCombine()  argument
131   const LLT Ty = MRI.getType(LHS);  in matchAArch64MulConstCombine()
134   auto Const = getIConstantVRegValWithLookThrough(RHS, MRI);  in matchAArch64MulConstCombine()
156     if (MRI.hasOneNonDBGUse(LHS) &&  in matchAArch64MulConstCombine()
157         (isSignExtended(LHS, MRI) || isZeroExtended(LHS, MRI)))  in matchAArch64MulConstCombine()
161     if (MRI.hasOneNonDBGUse(Dst)) {  in matchAArch64MulConstCombine()
162       MachineInstr &UseMI = *MRI.use_instr_begin(Dst);  in matchAArch64MulConstCombine()
238     MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B,  in applyAArch64MulConstCombine()  argument
248 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) {  in matchFoldMergeToZext()  argument
250   LLT SrcTy = MRI.getType(Merge.getSourceReg(0));  in matchFoldMergeToZext()
253   return mi_match(Merge.getSourceReg(1), MRI, m_SpecificICst(0));  in matchFoldMergeToZext()
256 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI,  in applyFoldMergeToZext()  argument
269 static bool matchMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI) {  in matchMutateAnyExtToZExt()  argument
280   return MRI.getType(Dst).isScalar() &&  in matchMutateAnyExtToZExt()
281          mi_match(Src, MRI,  in matchMutateAnyExtToZExt()
286 static void applyMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI,  in applyMutateAnyExtToZExt()  argument
296 static bool matchSplitStoreZero128(MachineInstr &MI, MachineRegisterInfo &MRI) {  in matchSplitStoreZero128()  argument
300   LLT ValTy = MRI.getType(Store.getValueReg());  in matchSplitStoreZero128()
305   if (!MRI.hasOneNonDBGUse(Store.getValueReg()))  in matchSplitStoreZero128()
308       *MRI.getVRegDef(Store.getValueReg()), MRI);  in matchSplitStoreZero128()
312 static void applySplitStoreZero128(MachineInstr &MI, MachineRegisterInfo &MRI,  in applySplitStoreZero128()  argument
317   assert(MRI.getType(Store.getValueReg()).isVector() &&  in applySplitStoreZero128()
322   auto HighPtr = B.buildPtrAdd(MRI.getType(PtrReg), PtrReg,  in applySplitStoreZero128()