Lines Matching refs:buildCopy
949 auto Copy = MIB.buildCopy({DstTempRC}, {SrcReg}); in selectCopy()
1971 auto Copy = MIB.buildCopy(LLT::scalar(64), SrcOp); in preISelLower()
1998 auto NewSrc = MIB.buildCopy(LLT::scalar(64), I.getOperand(1).getReg()); in preISelLower()
2582 MIB.buildCopy({DefReg}, {LoadMI->getOperand(0).getReg()}); in select()
2596 MIB.buildCopy({DefReg}, {DefGPRReg}); in select()
3569 MIB.buildCopy(DstPtrCopy, DstPtr); in selectMOPS()
3570 MIB.buildCopy(SrcValCopy, SrcOrVal); in selectMOPS()
3571 MIB.buildCopy(SizeCopy, Size); in selectMOPS()
3648 MIB.buildCopy(Register(AArch64::X0), LoadGOT.getReg(0)); in selectTLSGlobalValue()
3657 MIB.buildCopy(I.getOperand(0).getReg(), Register(AArch64::X0)); in selectTLSGlobalValue()
3938 MIB.buildCopy(DstReg, Cmp.getReg(0)); in selectVectorICmp()
5409 auto Copy = MIRBuilder.buildCopy(Dst, CPLoad->getOperand(0)); in emitConstantVector()
5765 MIB.buildCopy({SrcReg}, {I.getOperand(2)}); in selectIntrinsic()
5783 MIB.buildCopy({I.getOperand(0)}, {DstReg}); in selectIntrinsic()
5839 MIB.buildCopy({Register(AArch64::LR)}, {MFReturnAddr}); in selectIntrinsic()
5841 MIB.buildCopy({DstReg}, {Register(AArch64::LR)}); in selectIntrinsic()
5859 MIB.buildCopy({DstReg}, {FrameAddr}); in selectIntrinsic()
5871 MIB.buildCopy({DstReg}, {Register(AArch64::LR)}); in selectIntrinsic()
6627 auto Copy = MIB.buildCopy({&RC}, {Reg}); in moveScalarRegClass()
6826 auto Copy = MIB.buildCopy(Ty, OpReg); in fixupPHIOpBanks()