Lines Matching refs:TestReg
317 MachineInstr *emitTestBit(Register TestReg, uint64_t Bit, bool IsNegative,
1392 Register TestReg; in getTestBitReg() local
1398 TestReg = MI->getOperand(1).getReg(); in getTestBitReg()
1405 std::swap(ConstantReg, TestReg); in getTestBitReg()
1419 TestReg = MI->getOperand(1).getReg(); in getTestBitReg()
1429 if (!C || !TestReg.isValid()) in getTestBitReg()
1435 unsigned TestRegSize = MRI.getType(TestReg).getSizeInBits(); in getTestBitReg()
1442 NextReg = TestReg; in getTestBitReg()
1448 NextReg = TestReg; in getTestBitReg()
1455 NextReg = TestReg; in getTestBitReg()
1463 NextReg = TestReg; in getTestBitReg()
1478 NextReg = TestReg; in getTestBitReg()
1492 Register TestReg, uint64_t Bit, bool IsNegative, MachineBasicBlock *DstMBB, in emitTestBit() argument
1494 assert(TestReg.isValid()); in emitTestBit()
1500 TestReg = getTestBitReg(TestReg, Bit, IsNegative, MRI); in emitTestBit()
1501 LLT Ty = MRI.getType(TestReg); in emitTestBit()
1511 TestReg = moveScalarRegClass( in emitTestBit()
1512 TestReg, UseWReg ? AArch64::GPR32RegClass : AArch64::GPR64RegClass, in emitTestBit()
1519 MIB.buildInstr(Opc).addReg(TestReg).addImm(Bit).addMBB(DstMBB); in emitTestBit()
1558 Register TestReg = AndInst.getOperand(1).getReg(); in tryOptAndIntoCompareBranch() local
1561 emitTestBit(TestReg, Bit, Invert, DstMBB, MIB); in tryOptAndIntoCompareBranch()