Lines Matching refs:k_Register

328     k_Register,  enumerator
520 case k_Register: in AArch64Operand()
620 assert(Kind == k_Register && "Invalid access!"); in getReg()
645 assert(Kind == k_Register && "Invalid access!"); in getRegEqualityTy()
712 if (Kind == k_Register) in getShiftExtendType()
720 if (Kind == k_Register) in getShiftExtendAmount()
728 if (Kind == k_Register) in hasShiftExtendAmount()
1140 return Kind == k_Register; in isReg()
1144 return Kind == k_Register && Reg.Kind == RegKind::Scalar; in isScalarReg()
1148 return Kind == k_Register && Reg.Kind == RegKind::NeonVector; in isNeonVectorReg()
1152 return Kind == k_Register && Reg.Kind == RegKind::NeonVector && in isNeonVectorRegLo()
1178 return (Kind == k_Register && Reg.Kind == RK) && in isSVEVectorReg()
1183 return Kind == k_Register && Reg.Kind == RegKind::Scalar && in isFPRasZPR()
1189 if (Kind != k_Register || Reg.Kind != RegKind::SVEPredicateVector) in isSVEPredicateVectorRegOfWidth()
1200 if (Kind != k_Register || Reg.Kind != RegKind::SVEDataVector) in isSVEDataVectorRegOfWidth()
1233 return Kind == k_Register && Reg.Kind == RegKind::Scalar && in isGPR32as64()
1238 return Kind == k_Register && Reg.Kind == RegKind::Scalar && in isGPR64as32()
1243 return Kind == k_Register && Reg.Kind == RegKind::Scalar && in isGPR64x8()
1249 return Kind == k_Register && Reg.Kind == RegKind::Scalar && in isWSeqPair()
1255 return Kind == k_Register && Reg.Kind == RegKind::Scalar && in isXSeqPair()
1274 return Kind == k_Register && Reg.Kind == RegKind::Scalar && in isGPR64()
1280 if (Kind != k_Register || Reg.Kind != RegKind::Scalar) in isGPR64WithShiftExtend()
1985 auto Op = std::make_unique<AArch64Operand>(k_Register, Ctx); in CreateReg()
2312 case k_Register: in print()